550 views April 2, 2018 Rohit Singh 1
Introduction: Ethernet is a Link Layer Protocol in the TCP/IP protocol stack between the physical and data link layer. It is the most widely used protocol for Local Area Networks (LANs). Every device[...]
419 views March 29, 2018 Rohit Singh 3
Introduction The Numato Lab XO-Bus Lite is a framework for communicating with Numato Lab boards such as Saturn, Neso, Skoll, Styx etc from a host. XO-Bus Lite accelerates the development by provid[...]
104 views March 28, 2018 Rohit Singh 2
Introduction OpenOCD stands for Open On-Chip Debugger. It is an open-source software that supports debugging a wide variety of chips, devices and boards using a range of supported debug interfaces. I[...]
140 views March 23, 2018 Rohit Singh 1
Introduction: The FTDI FT2232H USB 2.0 chip on-board Neso, Skoll and Styx provides users with a FIFO interface for data transfer between FPGA and host PC. The FT2232H chip features two cha[...]
1446 views March 16, 2018 Rohit Singh 7
[caption id="attachment_11982" align="alignnone" width="1017"] Mandelbrot Fractal Output, Simple HDMI + VGA Framebuffer Design using Neso[/caption] Introduction Framebuffer refers to a memory (or an[...]
230 views February 14, 2018 Vijaya Lakshmi 3
Introduction The purpose of this article is to help readers understand how to use DDR3 memory available on Neso using Xilinx MIG 7 IP core easily. The Xilinx MIG 7 IP core provides users with two int[...]
169 views January 30, 2017 Rohit Singh 1
XO-Bus Lite Framework The Numato Lab XO-Bus Lite is a framework for communicating with Numato Lab boards such as Saturn, Neso, Skoll, Styx etc from a host. XO-Bus Lite accelerates the development by[...]
1398 views May 18, 2016 Rohit Singh 5
In the previous article we saw how to build Linux Kernel and run it on Neso Artix 7 FPGA Module using Xilinx Platform Cable USB and XMD. Though this is the easier method, there are a couple of drawbac[...]
2193 views May 18, 2016 Rohit Singh 3
Introduction FPGAs are best known their flexibility and versatility. Such flexibility allows FPGAs not only be used for custom logic circuits but also implement a processor on it and even run Linux (o[...]
2470 views February 14, 2016 admin 3
Introduction Vivado Design Suite by Xilinx is used for synthesis and analysis of HDL designs with additional features for SOC development and high-level synthesis. Xilinx recommends use of Vivado Desi[...]