Callisto Kintex 7 USB 3.1 FPGA Module

SKU: NLFX1002

Callisto Kintex 7 USB 3.1 FPGA Module

SKU: NLFX1002

    Current configuration - Edit
  • pa_fpga: none selected

$799.95$2,599.95

Features

  • FPGA: Kintex XC7K410T in FBG676 package
  • DDR3: 4Gb DDR3 (MT41J256M16HA-125:K or equivalent)
  • Flash memory: 1 Gb Quadbit SPI flash memory (MT25QL01GBBB)
  • 1 x 100MHz CMOS oscillator
  • USB 3.1 Gen1 @5Gbps (USB Type-C connector)
  • 12V DC power supply
  • JTAG header for programming and debugging
  • 274 IOs for user-defined purposes

Applications

  • Product Prototype Development
  • Communication Device Development
  • Accelerated Computing Integration
  • Development and Testing of Custom embedded processors
  • Signal Processing
  • Educational tool for Schools and Universities

Configure your product

Select a custom configuration for your product. If you need an additional improvement or have any questions, please send us a message on the form below.

FPGA

Callisto Kintex 7 USB 3.1 FPGA Module

SKU: NLFX1002

    Current configuration -
  • pa_fpga: none selected

$799.95$2,599.95

Callisto K7 is an easy to use FPGA Module featuring the Xilinx Kintex 7 FPGA with 4Gb DDR3 SDRAM. This board contains the Xilinx XC7K410T– FBG676 FPGA. The high-speed USB 3.1 interface (USB-C connector) provides a fast and easy configuration download to the onboard SPI flash. There is no need for a programmer or special downloader cable to download bitstream to the board. The FPGA Module also provides easy access to JTAG signals on a standard Xilinx Platform Cable compatible header. Callisto K7 provides the user with the flexibility of adding their own peripherals through IO Expansion Headers.

Features

  • FPGA: Kintex XC7K410T in FBG676 package
  • DDR3: 4Gb DDR3 (MT41J256M16HA-125:K or equivalent)
  • Flash memory: 1 Gb Quadbit SPI flash memory (MT25QL01GBBB)
  • 1 x 100MHz CMOS oscillator
  • USB 3.1 Gen1 @5Gbps (USB Type-C connector)
  • Onboard voltage regulators for single power rail operation
  • 12V DC power supply
  • A Push Button for the reset pin
  • JTAG header for programming and debugging
  • 274 IOs for user-defined purposes
  • All user IOs are length matched and can be used as differential pairs

Applications

  • Product Prototype Development
  • Communication Device Development
  • Accelerated Computing Integration
  • Development and Testing of Custom embedded processors
  • Signal Processing
  • Educational tool for Schools and Universities

callisto k7 header P1 pinout wired diagram

General FAQs

Specifications

Attribute Value
Weight 0.8 lbs
Dimensions 6 × 4 × 1 in
FPGA

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Memory

Number Of GPIOs (Max)

Configuration Options

,

Non-Volatile Configuration Storage

MT25QL01GBBB

Number of Clock Sources

1

Communication

USB 3.1

Primary Clock Frequency

Sample Code

Sample Code

Callisto K7 Microblaze HelloWorld Sample ProjectDownload
Callisto K7 DDR3 Test ProjectDownload
Callisto K7 FT601 Test ProjectDownload