Xilinx Kintex 7 FPGA Boards

Callisto K7 is an easy to use FPGA Module featuring the Xilinx Kintex 7 FPGA with 4Gb DDR3 SDRAM. This board contains the Xilinx XC7K410T– FBG676 FPGA. The high-speed USB 3.1 interface (USB-C connector) provides a fast and easy configuration download to the onboard SPI flash. There is no need for a programmer or special downloader cable to download bitstream to the board. The FPGA Module also provides easy access to JTAG signals on a standard Xilinx Platform Cable compatible header. Callisto K7 provides the user with the flexibility of adding their own peripherals through IO Expansion Headers.

• FPGA: Kintex XC7K410T in FBG676 package
• DDR3: 4Gb DDR3 (MT41J256M16HA-125:K or equivalent)
• Flash memory: 512 Mb Quad SPI flash memory (S25FL512SDSBHV210/IS25LP512M-RHLE)
• 1 x 100MHz CMOS oscillator
• USB 3.1 Gen1 @5Gbps (USB Type-C connector)
• Onboard voltage regulators for single power rail operation
• 12V DC power supply
• A Push Button for the reset pin
• JTAG header for programming and debugging.
• Maximum IOs for user-defined purposes
  • FPGA – 274 IOs

• Product Prototype Development
• Communication Devices Development
• Accelerated Computing Integration
• Development and Testing of Custom embedded processors
• Signal Processing
• Educational tool for Schools and Universities

The following sections describe in detail how to use this module.

Along with the module, you may need the accessories listed below for easy and fast installation:

1. 12 V DC Power Supply.
2. USB A to USB-C cable (Optional).
3. A Xilinx Platform Cable USB II compatible JTAG programmer

This diagram should be used as a reference only. For detailed information, see Callisto K7’s schematics and mechanical dimensions at the end of this page. Details of individual connectors are as shown below.

This super speed USB 3.1 interface (USB-C connector) is used to help the host PC to communicate with the module at very high speed (5Gbps). A USB-A to USB-C cable is used to connect the module to the host PC. It is primarily used to output debug information or as a console for the design running on the board. (the picture on the right shows USB-C connector).

By default, the board is configured to use the +5V supply from USB. So an external power is not required unless USB port is unable to supply enough current. USB 3.1 ports are only capable of providing enough current for the module for small designs that require less power. The current requirement for this board largely depends on your application. Please consult the FPGA datasheet for more details on power requirements. If for any reason, an external power supply needs to be used for the board, connect the DC power supply. Please refer to the marking on the board for more details. The external power supply should be in the range of +5 to +12V, with sufficient current rating.

A Heat Sink comes factory-installed with Callisto K7 to provide for heat dissipation for the Kintex-7 FPGA onboard. A header is provided to optionally connect a fan (not factory installed) for forced-cooling. The fan’s speed is controlled by the FAN_PWM signal connected to FPGA IO location N16, and the signal is pulled up by default, which means unless actively driven to 0 or controlled via PWM, the fan will run at maximum speed.

Callisto K7 features a Push-button S1 normally meant to be used as a “Reset” signal for designs running on FPGA. Push-button S2 is connected to FPGA pin K21. Push-button S1 is active-high. This push-button can also be used for any other input and is not just limited to be used as a Reset signal.

JTAG connector allows the FPGA’s JTAG registers to be accessed using a JTAG cable, compatible with Xilinx Platform Cable USB. Use this header, to attach JTAG cable for programming and debugging.

This device is equipped with a maximum of 274 user IO pins that can be used for various custom applications. All user IOs are length matched and can be used as differential pairs.

This product requires a driver to be installed for proper functioning when used with Windows. The D3XX driver can be downloaded from http://www.ftdichip.com/Drivers/D3XX.htm. Callisto K7 also has one FT232 which requires D2XX driver (It can be downloaded from http://www.ftdichip.com/Drivers/D2XX.htm). Windows users should download and run the latest WHQL Certified executable file that will prompt to install the FTDI CDM drivers. When the driver installation is complete, the module should appear in Callisto K7 Flash Config Tool as Callisto Kintex 7 USB 3.1 FPGA Module.

The bitstream can be generated for Callisto K7 in Vivado by following the steps below:

Step 1: It is recommended to generate a .bin bitstream file along with .bit bitstream file. Click “Bitstream Settings”.

Step 2: In the window that pops up, select the “-bin_file*” option and click OK.

Step 3: Finally click “Generate Bitstream”.

Callisto K7 is factory configured to be powered directly from the USB port so make sure that you are using a USB port that can power the board properly. It is recommended to connect the board directly to the PC instead of using a hub. It is practically very difficult to estimate the power consumption of the board, as it depends heavily on your design and the clock used. Xilinx provides tools to estimate power consumption. In any case, if power from USB is not enough for your application, external supply can be applied to the board. Callisto K7 requires three different voltages, a 3.3V, a 1.8V supply, and a 1.2V supply. Onboard regulators derive these voltages from the USB/Ext power supply.

Callisto Kintex-7 USB 3.1 FPGA Module features an onboard JTAG connector that facilitates easy reprogramming of SRAM and onboard SPI flash through JTAG programmer like “Xilinx Platform cable USB”. The following steps illustrate how to program FPGA on Callisto K7 using JTAG.

Step 1: Connect Xilinx Platform cable USB to Callisto K7 using JTAG cable. Power up Callisto K7.

Step 2:  Open Vivado Project. Click on “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.

Step 3: If the device is successfully detected, then right-click on the “xc7k410t_0(1)”. Select “Program Device” as shown below.

Step 4: In the dialog window which opens up, Vivado automatically chooses the correct bitstream file if the design was synthesized and implemented, and its bitstream was generated successfully. If needed, you can browse to the bitstream which needs to be programmed to the FPGA.

Click on the “Program” button and let the FPGA be programmed. There is a green colored LED (D1) on Callisto K7 which was lights up as an indicator that the FPGA is not programmed. Hence, once the programming process of FPGA is completed, the LED stops glowing.

A .bin or .mcs file is required for programming Callisto K7’s onboard QSPI flash.

Step 1: Open Vivado Project. Click on “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window.

Step 2: If the device is successfully detected, then right-click on the “xc7k410t_0”. Select “Add Configuration Memory Device” as shown below.

Step 3: Select the memory device “is25lp512m-spi-x1_x2_x4”, then click OK.

Step 4: After completion of Step 3 the following dialog box will open. Click OK.

Step 5: Browse to the working .bin file or the .mcs file (whichever is applicable) and click OK to program as shown below. If programming is successful, a confirmation message will be displayed.

Download XDC Constraints for Vivado

Callisto K7 V1.0 Schematics

Callisto K7 V2.0 Schematics

Callisto K7 GPIO Easy Reference