Introduction
In this article, we’ll explore the process of creating a simple “Hello World” project using Vivado IP Integrator and Vitis Unified IDE for the Elbert S7 FPGA Development Board. Our design will feature a MicroBlaze soft processor, which will be integrated with various peripherals through the AXI bus. Although MicroBlaze designs can utilize either PLB or AXI bus systems, we’ll focus on the AXI bus for this tutorial. For detailed information on MicroBlaze and additional resources, including the datasheet, please visit AMD’s dedicated MicroBlaze page.
Elbert S7 FPGA Development Board
The Elbert S7 is a compact and versatile FPGA development board designed to support a wide range of educational and practical digital design applications. Built around the Spartan-7 FPGA (XC7S50-1CSG324C) from AMD, this board offers a reliable platform for both beginners and experienced developers looking to explore the world of FPGAs.
Prerequisites:
Hardware:
- Elbert S7 FPGA Development Board
- AMD Platform Cable USB II JTAG debugger. (optional)
- USB A to USB Type C cable.
Software:
- Vivado Design Suite 2024.1
- Vitis Unified IDE 2024.1.
Creating Microblaze based Hardware Platform for Elbert S7
The following steps will walk you through the process of creating a new project with Vivado and building a hardware platform with MicroBlaze soft processor using an IP integrator. Numato Lab’s Elbert S7 FPGA Development Board is used in this example, but any compatible FPGA platform can be used with minor changes to the steps. Screenshots are added wherever possible to make the process easier for the reader.
Step 1:
Launch Vivado Design Suite, and go to “File->Project->New” to create a new project. The “New project” wizard will pop up. Click “Next” to continue.
Step 2:
In the “Project Name” wizard, type in a name for the project and save it at a convenient location. For this example, we shall use “Hello_world” as the project name (feel free to use any name). Select the checkbox below to keep all project files in a single folder. Click “Next” to proceed.
Step 3:
In the “Project type” wizard, select “RTL Project” and select the checkbox to skip specifying the source at the moment. Click “Next“.
Step 4:
At the “Default Part” wizard, select “Boards” and then select the “Elbert_S7” board. Click “Next” to continue. If Elbert is not displayed in the Boards list, you need to install Elbert board support files appropriately and retry this step. You can download Elbert board support files for Vivado here. Follow the readme in the link on how to install the Vivado board files in your system.
In the next wizard, click “Finish” to create a new project. When the new project wizard exits, a new project will open up in Vivado with the selected settings.
Step 5:
In the “Flow Navigator” panel, select “Create Block Design” under the IP integrator section. Give an appropriate name (Eg: “Hello_world“) to the design and click “OK“.
Step 6:
Go to Diagram window, right click and select “Add IP” from the popup menu. Search for “MicroBlaze” and add it to the design by double-clicking it.
Click “Run Block Automation” present in the “Designer Assistance available” bar on the top left corner of the window to complete the design. Select the settings as shown in the following image. Click “OK” for Vivado to automatically configure the blocks for you.
Step 7:
Double click “Clocking Wizard” IP and customize “Board” settings as shown in the following image.
Step 8:
Run “Connection Automation” and select all the pins.
Step 9:
Go to the Board section, Drag and drop the USB UART from the Board section to the design.
Click on “Run Connection Automation” select all the pins and Click ok.
Step 10:
Connect interrupt output lines from “AXI Uartlite” to the “Concat” block as shown in the below figure. Select the “Validate Design” option from the “Tools” menu to make sure that connections are correct.
Step 11:
Select the “Validate Design” option from the “Tools” menu to make sure that connections are correct.
Step 12:
Right-click “Hello_world” in the “Sources” window, and select “Create HDL Wrapper” from the popup menu. Click “OK” on the window that appears to finish generating a wrapper.
Step 13:
Click “Generate Bitstream” under the “Program And Debug” section to synthesize, implement, and generate a bitstream.
Step 14:
Once the implementation and generation of the bitstream are completed, we need to export the hardware along with the bitstream. Go to the “File” menu, and select “Export->Export Hardware“. Select the “Include bitstream” checkbox and click “OK” in the “Export Hardware” wizard.
Step 15:
Select Launch Vitis IDE from the Tools menu.
Step 16:
After Vitis Unified IDE window opens, click on “Open Workspace” and select necessary folder to keep the Vitis files.
Step 17:
Create a new platform for the project, by selecting “Create Platform Component”, click “Next”, in the Flow tab select the XSA file saved using the step 14 and finally click “Next” and “Finish” respectively.
After successful creation of the platform, build the platform.
Step 18:
Next create the Helloworld Application component by selecting the “Helloworld” template from the “examples”,
In “Create Application Component” tab specify project name and location, click “Next”
Select newly created Platform and click “Next”.
Select the domain as “Standalone_microblaze_0” and click “Next” and click on “Finish”
When the Helloworld project is added successfully, build the project manually.
Step 19:
Once the build is completed successfully, power up Elbert S7 FPGA Development Board using USB type C cable .
Step 20:
Program the FPGA on Elbert S7 with a simple boot loop program by selecting the Program Device option from the Vitis menu.
Once the “Program Device” window opens click on “Program“.
Step 21:
Meanwhile, open any serial terminal program (such as PuTTY, Teraterm etc) and open the port corresponding to Elbert S7 with a 9600 baud rate (the default baud rate given in UART IP). Program the board by selecting the “Run”.
Step 22:
If everything went well, the application running on the board should print “Hello World” over the UART and should be displayed on the Serial Terminal application.
