For many of us, learning FPGA was a natural next step in the world of micro-controllers and Embedded Systems. You learn the basics of Embedded Systems, do some projects using micro-controllers and microprocessors and one day realize that those devices may not be the best choice for a particular problem that you want to solve. A little research could lead you to FPGAs. But the FPGA world is very different from the microcontroller world you have seen so far. While micro-controller and Embedded System experience is very helpful, it can not help you get started with FPGAs without a somewhat steep learning curve. The tools are different, languages are different and even the programming paradigm is different.
But there is hope. By definition (in loose terms) FPGA is a bunch of logic elements that can be configured to make any logical circuit. If that is true, why not make a microprocessor out of those logic cells and program using traditional Embedded System-friendly languages and tools? Yes, it is possible. However, there is a question as to why this method of making a microprocessor or microcontroller out of FPGA logic is better compared to off-the-shelf microprocessors. There are many reasons why making a microprocessor/controller in FPGA fabric is better (or worse) compared to an off-the-shelf micro. The most important reason is that you have access to the FPGA fabric from the micro-controller (through buses and peripherals created within the fabric, of course) and you can implement peripherals from a vast array of Xilinx’s freely available peripheral IPs or create your IP (or buy third-party IPs). It is possible to make pretty much any peripheral that you want within the capability of the FPGA that you have chosen to work with. There are a few important downsides to this scheme though. The total cost of hardware will be usually higher compared to an off-the-shelf micro for the same amount of raw processing power. If you can not find the peripheral IP that you are looking for, you will end up having to write one using Verilog or VHDL and you are back to square one (remember, what we wanted to do was not to deal with HDLs or FPGA workflow at all). It is possible to buy third-party IPs but depending on the specific IP, it can be very expensive. Also, it is worth mentioning that the tools required to build an embedded system out of FPGA could set you back by a few hundred dollars.
Let us take a look at what a processor-based embedded system built into an FPGA would look like in its simplest form. As you can see in the diagram below, an embedded system built in FPGA fabric is not really different from any other embedded system. It has a processor, memory, buses, peripherals, etc. everything that you would expect in a normal Embedded System configuration. It is just that the processor, buses, and peripherals are all made by using logic cells that are available within the FPGA.
As you can see here, you could use a variety of peripherals from a variety of sources. The peripherals could be communication peripherals such as I2C, SPI, UART, or signal processing cores such as FFT, filters, or anything that you could imagine and implement on the FPGA fabric. This flexibility gives FPGA-based embedded systems an edge in some situations compared to traditional microcontrollers where peripheral choices are often less flexible.
Embedded Infrastructure by Xilinx
Xilinx is arguably the world leader in FPGA and other programmable logic. They provide tools for building embedded systems around many of their FPGAs. Xilinx offers two kinds of fundamental options when it comes to implementing an Embedded system.
- Processor instantiated on FPGA fabric or so-called Soft Processors (Microblaze, Picoblaze)
- Hard processor on the die which has dedicated connectivity to FPGA fabric
As you can imagine, soft processors will use part of FPGA fabric to function and you have to be happy with what is left to implement your peripherals. But with Hard processor cores, FPGA fabric is not used for implementing the processor and you will have 100% of FPGA fabric (or close to 100%) to implement your own peripherals. Hard processor cores are usually more powerful as well. But as of writing this article, the price of FPGAs with built-in hard processor cores tends to be higher.
During this tutorial, we will stick with Soft processors, Microblaze to be specific. This is because Microblaze can be implemented on relatively inexpensive hardware such as Mimas S7. Please note that the MicroBlaze soft processor is not compatible with Spartan 3 devices.
In simple terms developing an Embedded System with Xilinx FPGAs consists of the following steps.
- Create a Microblaze-based embedded system project
- Add additional peripherals as necessary
- Configure the processor and other subsystems
- Build the processor core and all subsystems to generate a bit file that can be programmed to FPGA
- Create a software project that can run on the hardware infrastructure already made
- Write your program in C and build
- Download everything to the FPGA and run
While it sounds a little complicated, Xilinx’s powerful tools make it very easy to implement those steps in practice. We will implement a working Embedded System with writing less than 10 lines of code. Now it looks like it is the right time to introduce Xilinx’s tools that we will use to accomplish the above steps. We will be using the following tools throughout the rest of this tutorial.
- Xilinx Vivado Design Suite 2023.2.1 (https://www.xilinx.com/support/download.html)
- Xilinx Vitis
Xilinx Vivado Design Suite is the tool you will use to design the hardware part of the embedded system (Processor, peripherals, buses, etc..). Xilinx Vitis is a software development environment based on Eclipse IDE. A lot of people will find the Vitis tool visually very familiar because of this. Using Vitis , you can create software projects and write C code that would run on the Embedded System designed using Vivado. Confused? don’t worry, everything will become much clearer when we go through the process step by step.
Xilinx Vivado and Vitis can be downloaded and installed from the Xilinx website as a single package. But they are licensed separately. You will need one license for Vivado (unlimited license but device limited, good enough for these tutorials) and another license for Vitis . Xilinx used to offer 30-day evaluation license. (Please contact Xilinx to find out more information). How to download, install, and license these tools is beyond the scope of this tutorial. Please visit xilinx.com to get more help on this.
Let’s get our hands dirty
To keep this tutorial concise and easy to follow, we will implement a simple Hello World Embedded System. Once implemented, it will print “Hello World” through the serial port. We will use the Mimas S7 lite FPGA development board as the hardware platform to implement this project. Mimas S7 has an Spartan 7 7S50 FPGA and an onboard USB – Serial converter which would help us print data to the PC.
Configuring and Building Microblaze Soft Processor and Peripherals
So far we have looked at some basics and selected a hardware platform. Now we will create a project using Xilinx Vivado Design Suite and configure a Microblaze-based soft processor and some peripherals. Before we can create a project we must copy some supporting files to the Vivado installation directory. These files will help us create and configure the project with a few simple mouse clicks. Download the Vivado BSP files for Mimas S7 Lite and extract the contents to the “board_files” directory within the Xilinx Vivado installation. If you have installed Vivado 2023.2.1 on C:\ drive, the whole path to these files will be C:\Xilinx\Vivado\2023.2\data\boards\board_files.
Step 1:
Launch Vivado Design Suite, and go to “File->Project->New” to create a new project. The “New project” wizard will pop up. Click “Next” to continue.
Step 2:
In the “Project Name” wizard, type in a name for the project and save it at a convenient location. For this example, we shall use “Hello_world” as the project name (feel free to use any name). Select the checkbox below to keep all project files in a single folder. Click “Next” to proceed.
Step 3:
In the “Project type” wizard, select “RTL Project” and select the checkbox to skip specifying the source at the moment. Click “Next“.
Step 4:
At the “Default Part” wizard, select “Boards” and then select the “Mimas_S7_Lite” board. Click “Next” to continue. If Mimas_S7_Lite is not displayed in the Boards list, you need to install Mimas_S7_Lite board support files appropriately and retry this step. You can download Mimas S7 Lite board support files for Vivado here. Follow the readme in the link on how to install the Vivado board files in your system.
In the next wizard, click “Finish” to create a new project. When the new project wizard exits, a new project will open up in Vivado with the selected settings.
Step 5:
In the “Flow Navigator” panel, select “Create Block Design” under the IP integrator section. Give an appropriate name (Eg: “Hello_world“) to the design and click “OK“.
Step 6:
Go to Diagram window, right click and select “Add IP” from the popup menu. Search for “MicroBlaze” and add it to the design by double-clicking it.
Click “Run Block Automation” present in the “Designer Assistance available” bar on the top left corner of the window to complete the design. Select the settings as shown in the following image. Click “OK” for Vivado to automatically configure the blocks for you.
Step 7:
Double click “Clocking Wizard” IP and customize “Board” settings as shown in the following image.
Step 8:
Run “Connection Automation” and select all the pins.
Step 9:
Select “Add IP” from the popup menu. Search for “AXI Uartlite” and add it to the design by double-clicking it. Click on “Run Connection Automation” select all the pins and Click ok.
Step 10:
Connect interrupt output lines from “AXI Uartlite” to the “Concat” block as shown in the below figure. Select the “Validate Design” option from the “Tools” menu to make sure that connections are correct.
Step 10:
Select the “Validate Design” option from the “Tools” menu to make sure that connections are correct.
Step 11:
Right-click “Hello_world_i” in the “Sources” window, and select “Create HDL Wrapper” from the popup menu. Click “OK” on the window that appears to finish generating a wrapper.
Step 12:
Click “Generate Bitstream” under the “Program And Debug” section to synthesize, implement, and generate a bitstream.
Step 16:
Once the implementation and generation of the bitstream are completed, we need to export the hardware along with the bitstream. Go to the “File” menu, and select “Export->Export Hardware“. Select the “Include bitstream” checkbox and click “OK” in the “Export Hardware” wizard.
Step 17:
Launch Vitis IDE. In the Vitis window, select “Create Application Project” and click “Next” in the dialog box that appears.
In the “Platform” window, select the “Create a new platform from hardware” tab and import the “XSA file” that is already created (Provide XSA file location). Click “Next“.
Step 18:
In the “Application Project Details” window, give an appropriate name for the Vitis Project and click “Next“. Click “Next” in the “Domain” window. Select the “Hello World” template from the list of available templates and click “Finish“.
Step 19:
Build the project. Once the build is completed successfully, power up Mimas S7 lite using a USB C cable.
Step 20:
Program the FPGA on Mimas s7 Lite with a simple boot loop program by selecting the “Program Device” option from the “Vitis” menu
Step 21:
Open the COM port corresponding to Mimas s7 Lite in any serial terminal (PuTTY, Tera Term, etc.) with a 9600 baud rate (the default baud rate given in UART IP). Now, right-click on the “.elf file” in Project Explorer and select “Launch Hardware” as shown below.
If everything went well, the application running on the board should print “Hello World” over the USB UART and should be displayed on the Serial Terminal application.
