Xilinx Artix 7 FPGA Boards

Mimas A7 Mini FPGA Development Board

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Introduction

Mimas A7 Mini is an easy to use FPGA Development board featuring Artix 7 FPGA (XC7A35T – FTG256C package) with FTDI’s FT2232H Dual-Channel USB device. It is a Artix-7 based replacement and upgrade of Mimas Spartan 6 FPGA Board. It is specially designed for the development and integration of FPGA based accelerated features to other designs. The USB 2.0 host interface based on popular FT2232H offers high bandwidth data transfer and board programming without the need for any external programming adapters.

Board Features

  • Device: Xilinx Artix 7 FPGA (XC7A35T-1FTG256C)
  • DDR3: 2Gb DDR3 (MT41J128M16JT-125 or equivalent)
  • Built-in programming interface. No expensive JTAG adapters needed for programming the board
  • Onboard 128Mb flash memory for FPGA configuration storage and custom user data storage
  • High-Speed USB 2.0 interface for On-board flash programming. FT2232H Channel B is dedicated for JTAG Programming. Channel A can be used for custom applications.
  • 100MHz CMOS oscillator
  • 8 LEDs, 1 RGB LED and 4 Push Buttons for user-defined purposes
  • FPGA configuration via JTAG and USB
  • Maximum IOs for user-defined purposes
    • FPGA – 70 IOs (35 professionally length matched Differential Pairs) and two 2×6 Expansion Headers

Applications

  • Product Prototype Development
  • Accelerated computing integration
  • Development and testing of custom embedded processors
  • Communication devices development
  • Educational tool for Schools and Universities

How to use Mimas A7 Mini FPGA Development Board

The following sections describe in detail how to use this module.

Hardware Accessories Required

For easy and fast installation, you may need the following items along with the Mimas A7 Mini module.

  • USB A to USB B Micro cable
  • DC Power supply
  • A Xilinx Platform Cable USB II compatible JTAG programmer

Connection Diagram

The following connection diagram should be used for reference only. The schematics are available at the end of this document for detailed information.

USB Interface

The onboard full speed USB controller helps a PC/Linux/Mac computer to communicate with this module. Use a USB A to USB B Micro cable to connect with a PC (the picture on the right shows USB B Micro connector).

 

External Power Supply

The board can be configured to use power from External power supply by connecting it to the External +5V supply. Please refer to the marking on the board for more details (the picture on the right shows External +5V supply connector).

 

JTAG Connector

JTAG connector allows the FPGA’s JTAG registers to be accessed using a JTAG cable, compatible with Xilinx Platform Cable USB. Use this header (P2), to attach JTAG cable for programming and debugging.

LEDs, RGB LED and Push Button

Mimas A7 Mini Development Board has four push-button switches, one RGB LED and eight LEDs for human interaction. All switches are directly connected to Artix 7 FPGA and can be used in your design with minimal effort.

GPIOs

This device is equipped with a maximum of 70 user IO pins that can be used for various custom applications. All user IOs are length matched and can be used as differential pairs.

Header P4

Version 2.0:

Pin No. On The HeaderGPIO Pin NameArtix-7 (FTG256) Pin No.Pin No. On The HeaderGPIO Pin NameArtix-7 (FTG256) Pin No.
2VCCIO1GND
4GPIO_1_PE123GPIO_1_NE13
6GPIO_2_PE165GPIO_2_ND16
8GPIO_3_PF157GPIO_3_NE15
10GPIO_4_PG149GPIO_4_NF14
12GPIO_5_PJ1511GPIO_5_NJ16
14GPIO_6_PH1413GPIO_6_NG15
16GPIO_7_PF1215GPIO_7_NF13
18GPIO_8_PH1217GPIO_8_NH13
20GPIO_9_PH1119GPIO_9_NG12
22GPIO_10_PM521GPIO_10_NN4
24GPIO_11_PT423GPIO_11_NT3
26GPIO_12_PR325GPIO_12_NT2
28GPIO_13_PP427GPIO_13_NP3
30GPIO_14_PR229GPIO_14_NR1
32GPIO_15_PN331GPIO_15_NN2
34GPIO_16_PM233GPIO_16_NM1
36GPIO_17_PN135GPIO_17_NP1
38GPIO_18_PL437GPIO_18_NM4
40VCCIO39GND

Version 4.0: 

Pin No. On The HeaderGPIO Pin NameArtix-7 (FTG256) Pin No.Pin No. On The HeaderGPIO Pin NameArtix-7 (FTG256) Pin No.
2GND1VCCIO
4GPIO_1_PE123GPIO_1_NE13
6GPIO_2_PE165GPIO_2_ND16
8GPIO_3_PF157GPIO_3_NE15
10GPIO_4_PG149GPIO_4_NF14
12GPIO_5_PJ1511GPIO_5_NJ16
14GPIO_6_PH1413GPIO_6_NG15
16GPIO_7_PF1215GPIO_7_NF13
18GPIO_8_PH1217GPIO_8_NH13
20GPIO_9_PH1119GPIO_9_NG12
22GPIO_10_PM521GPIO_10_NN4
24GPIO_11_PT423GPIO_11_NT3
26GPIO_12_PR325GPIO_12_NT2
28GPIO_13_PP427GPIO_13_NP3
30GPIO_14_PR229GPIO_14_NR1
32GPIO_15_PN331GPIO_15_NN2
34GPIO_16_PM233GPIO_16_NM1
36GPIO_17_PN135GPIO_17_NP1
38GPIO_18_PL437GPIO_18_NM4
40GND39VCCIO

Header P5

Version 2.0:

Pin No. On The HeaderGPIO Pin NameArtix-7 (FTG256) Pin No.Pin No. On The HeaderGPIO Pin NameArtix-7 (FTG256) Pin No.
2GND1VCCIO
4GPIO_19_ND153GPIO_19_PD14
6GPIO_20_NB145GPIO_20_PC14
8GPIO_21_NC137GPIO_21_PD13
10GPIO_22_NC129GPIO_22_PC11
12GPIO_23_NG1611GPIO_23_PH16
14GPIO_35G1113GPIO_34D10
16GPIO_24_NB1615GPIO_24_PC16
18GPIO_25_NA1517GPIO_25_PB15
20GPIO_26_ND1119GPIO_26_PE11
22GND21GND
24GPIO_27_NB1123GPIO_27_PB10
26GPIO_28_NC925GPIO_28_PC8
28GPIO_29_ND927GPIO_29_PD8
30GPIO_30_NA1429GPIO_30_PA13
32GPIO_31_NA1231GPIO_31_PB12
34GPIO_32_NA1033GPIO_32_PB9
36GPIO_33_NA935GPIO_33_PA8
38GPIO_37P537GPIO_36L5
40GND39VCCIO

Version 4.0: 

Pin No. On The HeaderGPIO Pin NameArtix-7 (FTG256) Pin No.Pin No. On The HeaderGPIO Pin NameArtix-7 (FTG256) Pin No.
2VCCIO1GND
4GPIO_19_ND153GPIO_19_PD14
6GPIO_20_NB145GPIO_20_PC14
8GPIO_21_NC137GPIO_21_PD13
10GPIO_22_NC129GPIO_22_PC11
12GPIO_23_NG1611GPIO_23_PH16
14GPIO_35G1113GPIO_34D10
16GPIO_24_NB1615GPIO_24_PC16
18GPIO_25_NA1517GPIO_25_PB15
20GPIO_26_ND1119GPIO_26_PE11
22GND21GND
24GPIO_27_NB1123GPIO_27_PB10
26GPIO_28_NC925GPIO_28_PC8
28GPIO_29_ND927GPIO_29_PD8
30GPIO_30_NA1429GPIO_30_PA13
32GPIO_31_NA1231GPIO_31_PB12
34GPIO_32_NA1033GPIO_32_PB9
36GPIO_33_NA935GPIO_33_PA8
38GPIO_37P537GPIO_36L5
40VCCIO39GND

Header P7 (2x6 Expansion Header)

Pin No. On The HeaderGPIO 2X6 CONNECTOR Pin NameArtix-7 (FTG256) Pin No.Pin No. On The HeaderGPIO 2X6 CONNECTOR Pin NameArtix-7 (FTG256) Pin No.
6VCC12VCC
5GND11GND
4CONN0_D3T1010CONN0_D7R7
3CONN0_D2T99CONN0_D6R6
2CONN0_D1P118CONN0_D5T5
1CONN0_D0P107CONN0_D4R5

Header P10 (2x6 Expansion Header)

Pin No. On The HeaderGPIO 2X6 CONNECTOR Pin NameArtix-7 (FTG256) Pin No.Pin No. On The HeaderGPIO 2X6 CONNECTOR Pin NameArtix-7 (FTG256) Pin No.
6VCC12VCC
5GND11GND
4CONN1_D3M1210CONN1_D7R8
3CONN1_D2L139CONN1_D6P8
2CONN1_D1P138CONN1_D5P9
1CONN1_D0N137CONN1_D4N9

FT2232H - Artix-7 (FTG256) FPGA Connection Details

FTDI Pin No.Pin Function (245 FIFO)Artix-7 (FTG256) Pin No.
16FTDI-D0M16
17FTDI-D1N16
18FTDI-D2P15
19FTDI-D3P16
21FTDI-D4R15
22FTDI-D5R16
23FTDI-D6T14
24FTDI-D7T15
26FTDI-RXE_NT7
27FTDI-TXE_NT8
28FTDI-RD_NN12
29FTDI-WR_NP14
30FTDI-SIWUA_NM12
32FTDI-CLKOUTN14
33FTDI-OE#L15

Driver Installation

Windows

This product requires a driver to be installed for proper functioning when used with Windows. The Numato Lab Mimas A7 Mini driver can be downloaded from here. When the driver installation is complete, the module should appear in FT_Prog Tool as Mimas A7 Mini FPGA Development Board.

 

Linux

The Linux ships with the drivers required for Mimas A7 Mini. It should be enough to run the following two commands in the terminal:

>> sudo modprobe ftdi_sio
>> echo 2a19 100e > /sys/bus/usb-serial/drivers/ftdi_sio/new_id

Generating Bitstream for Mimas A7 Mini

The bitstream can be generated for Mimas A7 Mini in Vivado by following the steps below:

Step 1: It is recommended to generate .bin file along with .bit file. Right-click on “Generate Bitstream” under the “Program and Debug” section of the Flow Navigator window and click “Bitstream Settings”.

Step 2: Select “-bin_file” option in the dialog window and click “Apply” and then “OK”.

Step 3: Finally click “Generate Bitstream”.

 

Configuring Mimas A7 Mini Module

Configuring Mimas A7 Mini Module Using JTAG

Mimas A7 Mini – Artix-7 Development Board features an onboard JTAG connector that facilitates easy reprogramming of SRAM and onboard SPI flash through JTAG programmer like “Xilinx Platform Cable USB”. Programming Mimas A7 Mini using JTAG requires “Xilinx Vivado Hardware Manager” software which is bundled with Xilinx Vivado Design Suite. To program the SPI flash we need a “.mcs/.bin” file that needs to be generated from the “.bit” file. Steps for generating the “.mcs/.bin” file are as below. Programming FPGA SRAM does not require a “.mcs/.bin” file to be generated.

Generating Memory Configuration File for Mimas A7 Mini using Vivado

The screenshots shown in the following steps are captured from the Vivado Design Suite 2018.2.

Step 1: Open Xilinx Vivado Hardware Manager. Connect the board, click “Generate Memory Configuration File….” from the “Tools” menu. “Write Memory Configuration File” pop up window will open.

Step 2: Select the ‘Format’ and Configuration Memory Part as shown below. Choose the format as MCS/BIN/HEX depending on your requirement. Now, click “OK”.

 

Step 3: Browse to the path where you wish to save the Configuration File and type the file name as “sample.bin” (or any name as per your wish/requirement) to save the memory configuration file (the format of the file may change depending on your “Format”). Select the “Load bitstream files” under the ”Options” tab and browse to the “.bit” file we already generated then click “OK” to generate the memory configuration file.

 

Programming QSPI Flash using Vivado

A .bin or .mcs file is required for programming Mimas A7 Mini’s onboard QSPI flash.

Step 1: Open the Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.

Step 2: If the device is detected successfully, it will be displayed as shown in the image below. To add Configuration Memory Device, right-click on the target device “xc7a35t_0” and select “Add Configuration Memory Device” as shown below.

Step 3: Select the memory device “mt25ql128-spi-x1_x2_x4 (which is equivalent to n25q128-3.3v-spi-x1_x2_x4)”, then click OK.

Step 4: After completion of Step 3 the following dialog box will open. Click OK.

Step 5: Browse to the working .bin file or the .mcs file (whichever applicable) and click OK to program as shown below. If programming is successful, a confirmation message will be displayed.

Programming FPGA using Vivado

Mimas A7 Mini – Artix-7 FPGA Development Board features an onboard JTAG connector that facilitates easy reprogramming of SRAM and onboard SPI flash through JTAG programmer like “Xilinx Platform cable USB”. The following steps illustrate how to program FPGA on Mimas A7 Mini using JTAG.

Step 1: By using JTAG cable, connect Xilinx platform cable USB to Mimas A7 Mini and power it up.

Step 2: Open the Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.

Step 3: If the device is detected successfully, to program the device, right-click on the target device “xc7a35t_0” and select “Program Device” as shown below.

Step 4: In the dialog window which opens up, Vivado automatically chooses the correct bitstream file if the design was synthesized, implemented and if the bitstream was generated successfully. If needed, browse to the bitstream which needs to be programmed to FPGA. Finally, click on “Program”.

Programming Mimas A7 Mini Using Tenagra

For steps on how to program Mimas A7 Mini using Tenagra, refer the Getting started with Tenagra FPGA System Management Software article.

Technical Specifications

Parameter *ValueUnit
Basic Specifications
Number of GPIOs70
On-board oscillator frequency (ASEM1-100.000MHZ-LC-T)100MHz
DDR3 SDRAM (MT41J128M16JT-125 or equivalent)2Gb
Quad SPI Flash Memory (N25Q128A11ESE40FTR)128Mb
Power supply voltage (USB or External)5 V
Number of LEDs8
Number of Push Buttons4
FPGA Specifications
Internal supply voltage relative to GND -0.5 to 1.1V
Auxiliary supply voltage relative to GND -0.5 to 2.0V
Output drivers supply voltage relative to GND -0.5 to 3.6V

* All parameters considered nominal. Numato Systems Pvt Ltd reserves the right to modify products without notice.

Physical Dimensions

Schematics

Mimas A7 Mini GPIO Easy Reference

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