Introduction
Skoll is an easy to use FPGA Development board featuring XC7K70T FPGA Kintex 7 FPGA with FTDI’s FT2232H Dual-Channel USB device. It is specifically designed for development and integration of FPGA based accelerated features in to other larger designs. The high speed USB 2.0 interface provides fast and easy configuration download to the on-board SPI flash. No programmer or special down loader cable is needed to download the bit stream to the board. The second FTDI channel can be used to develop custom high data-rate USB based applications. Skoll provides user flexibility in adding their own peripherals though IO Expansion Headers
Board features
- Pin compatible with :
–Saturn Spartan 6 FPGA Module
–Telesto MAX10 FPGA Module
–Neso Artix 7 FPGA Module
–Styx Zynq 7020 FPGA Module and offers a seamless upgrade path - FPGA: XC7K70T in FBG484 package, Speed Grade: -1
- DDR3: 2Gb DDR3 (MT41J128M16HA-125:K or equivalant)
- Flash memory: 128 Mb Quad bit SPI flash memory (N25Q128A13EF840E)
- 100MHz CMOS oscillator
- Revision V1: High Speed USB 2.0 interface for On-board flash programming. FT2232H Channel A is dedicated for SPI Flash /JTAG Programming. Channel B can be used for custom applications.
- Revision V2: High Speed USB 2.0 interface for On-board flash programming. FT2232H Channel B is dedicated for SPI Flash /JTAG Programming. Channel A can be used for custom applications.
- On-board voltage regulators for single power rail operation
- FPGA configuration via JTAG and USB
- Maximum IOs for user defined purposes
- FPGA – 150 IOs
- FT2232H – 8 IOs
Applications
- Product Prototype Development
- Accelerated computing integration
- Development and testing of custom embedded processors
- Signal Processing
- Communication devices development
- Educational tool for Schools and Universities
How to use the module
The following sections describe in detail how to use this module.
Hardware Accessories Required
Along with the module, you may need the items in the list below for easy and fast installation.
- USB A to Micro B cable.
- DC Power supply.
- A Xilinx Platform Cable USB II compatible JTAG programmer.
USB Interface
The on board full speed USB controller helps a PC/Linux/Mac computer to communicate with this module. Use a USB A to Micro B cable to connect with a PC. By default the module is powered from USB so make sure not to overcrowd unpowered USB hubs (the picture on the right shows USB Micro connector).
FT2232H Channel B is dedicated for SPI Flash /JTAG Programming. Channel A can be used for custom applications.
DC Power Supply
By default the board is configured to use +5V supply from USB. So an external power is not required unless USB port is unable to supply enough current. USB 2.0 ports are only capable of providing enough current for the module for small designs which require less power. Current requirement for this board largely depends on your application. Please consult FPGA data sheet for more details on power requirements. If for any reason, an external power supply needs to be used for the board, the Power select jumper should be configured properly before connecting the power supply. Please refer to the marking on the board for more details. External power supply should be in the range of +5 to +12V, with sufficient current rating.
Power Select
The Power Select header P7 is used to configure the power source for the board. Connect pins 1 and 2 to use USB power and pin connect pins 2 and 3 to use the external DC power.
JTAG/SPI Configuration on FT2232H channel A
Channel A of FT2232H can be connected to the SPI bus that connects the SPI Flash chip to the FPGA or to the JTAG pins of the FPGA. By connecting SPI bus to FT2232H channel A, the SPI flash can be directly programmed to save the configuration permanently. This is the default configuration set when Skoll is shipped. When FT2232H channel A is connected to SPI, Skoll Configuration Downloader utility can be used to program the board.
When FT2232H channel A is connected to FPGA JTAG, the JTAG signals can be accessed directly through FT2232H. Skoll Configuration Downloader utility currently does not support programming FPGA SRAM through JTAG.
Please see the tables below for information about selecting SPI or JTAG for FT2232H channel A. SPI must be selected for Skoll Configuration Downloader utility to work.
Solder Jumpers P2
-
Jumper Configuration for SPI Jumper Configuration for JTAG 1 - 2 1 - 3 5 - 6 4 - 6
Solder Jumpers P3
-
Jumper Configuration for SPI Jumper Configuration for JTAG 1 - 2 1 - 3 5 - 6 4 - 6
Important: These jumper settings are only meant for accessing the JTAG signals via FT2232H through USB using programs such as xc3sprog
. If you are using external JTAG such as Xilinx Platform Cable USB II connected to the JTAG header, then please do not change these jumpers. They should be in the factory-shipped SPI configuration. If the jumpers are changed to JTAG mode, and an external JTAG is used, then the external JTAG will not work.
GPIOs
This device is equipped with a maximum 150 user IO pins that can be used for various custom applications. All user IOs are length matched and can be used as differential pairs.
Header P4
Pin No. On The Header | Kintex-7 (FBG484) Pin No. | Pin No. On The Header | Kintex-7 (FBG484) Pin No. |
---|---|---|---|
1 | GND | 2 | 3V3 |
3 | VCCIN | 4 | GND |
5 | K22 | 6 | K21 |
7 | M18 | 8 | M17 |
9 | J22 | 10 | J21 |
11 | L20 | 12 | L19 |
13 | H20 | 14 | J20 |
15 | G22 | 16 | H22 |
17 | E22 | 18 | E21 |
19 | F21 | 20 | G21 |
21 | F20 | 22 | G20 |
23 | D22 | 24 | D21 |
25 | B21 | 26 | B20 |
27 | B22 | 28 | C22 |
29 | A21 | 30 | A20 |
31 | F13 | 32 | G13 |
33 | G16 | 34 | G15 |
35 | K19 | 36 | L18 |
37 | D20 | 38 | D19 |
39 | G12 | 40 | H12 |
41 | C20 | 42 | C19 |
43 | E18 | 44 | E17 |
45 | D17 | 46 | E16 |
47 | D16 | 48 | D15 |
49 | GND | 50 | GND |
51 | GND | 52 | GND |
53 | D14 | 54 | E14 |
55 | E12 | 56 | E13 |
57 | A18 | 58 | B17 |
59 | A19 | 60 | B18 |
61 | A16 | 62 | B16 |
63 | C18 | 64 | C17 |
65 | A15 | 66 | B15 |
67 | C15 | 68 | C14 |
69 | A14 | 70 | A13 |
71 | B13 | 72 | C13 |
73 | B12 | 74 | C12 |
75 | F10 | 76 | F11 |
77 | B10 | 78 | B11 |
79 | C10 | 80 | D10 |
81 | A10 | 82 | A11 |
83 | C9 | 84 | D9 |
85 | A8 | 86 | A9 |
87 | B8 | 88 | C8 |
89 | GND | 90 | GND |
91 | GND | 92 | GND |
93 | 3V3 | 94 | 3V3 |
95 | 3V3 | 96 | 3V3 |
Header P5
Pin No. On The Header | Kintex-7 (FBG484) Pin No. | Pin No. On The Header | Kintex-7 (FBG484) Pin No. |
---|---|---|---|
1 | ACBUS0*/BCBUS0** | 2 | ACBUS1/BCBUS1 |
3 | 3V3 | 4 | GND |
5 | ACBUS2/BCBUS2 | 6 | ACBUS3/BCBUS3 |
7 | N20 | 8 | M21 |
9 | ACBUS4/BCBUS4 | 10 | ACBUS5/BCBUS5 |
11 | N22 | 12 | M22 |
13 | ACBUS6/BCBUS6 | 14 | ACBUS7/BCBUS7 |
15 | M20 | 16 | L21 |
17 | N18 | 18 | N19 |
19 | P19 | 20 | P20 |
21 | R18 | 22 | R19 |
23 | P21 | 24 | P22 |
25 | T18 | 26 | U18 |
27 | R21 | 28 | R22 |
29 | V19 | 30 | W19 |
31 | T20 | 32 | U20 |
33 | AA21 | 34 | AB22 |
35 | U17 | 36 | V18 |
37 | AA18 | 38 | AB18 |
39 | AA20 | 40 | AB21 |
41 | P16 | 42 | N17 |
43 | AA19 | 44 | AB20 |
45 | GND | 46 | GND |
47 | GND | 48 | GND |
49 | GND | 50 | GND |
51 | GND | 52 | GND |
53 | R17 | 54 | P17 |
55 | V20 | 56 | W20 |
57 | Y18 | 58 | Y19 |
59 | AA16 | 60 | AB17 |
61 | W17 | 62 | Y17 |
63 | R16 | 64 | T16 |
65 | AB15 | 66 | AB16 |
67 | T15 | 68 | U15 |
69 | W14 | 70 | Y14 |
71 | J16 | 72 | J17 |
73 | H14 | 74 | H13 |
75 | AA14 | 76 | AA15 |
77 | G11 | 78 | G10 |
79 | H9 | 80 | H8 |
81 | F9 | 82 | E9 |
83 | U16 | 84 | V17 |
85 | G8 | 86 | F8 |
87 | V15 | 88 | W15 |
89 | INITB | 90 | 3V3 |
91 | PROGB | 92 | 3V3 |
93 | GND | 94 | GND |
95 | GND | 96 | GND |
*Revision V1: ACBUS0 – ACBUS7 are pins of FTDI FT2232H Dual-Channel USB device.
**Revision V2: BCBUS0 – BCBUS7 are pins of FTDI FT2232H Dual-Channel USB device.
FT2232H – Kintex-7 (FBG484) FPGA Connection Details
Skoll Revision V1
FTDI Pin No. | Pin Function (245 FIFO) | Kintex-7 Pin No. |
---|---|---|
38 | D0 | T21 |
39 | D1 | U22 |
40 | D2 | U21 |
41 | D3 | V22 |
43 | D4 | W21 |
44 | D5 | W22 |
45 | D6 | Y21 |
46 | D7 | Y22 |
48 | RXF# | D12 |
52 | TXE# | H15 |
53 | RD# | K17 |
54 | WR# | V14 |
55 | SIWUB | T19 |
Skoll Revision V2
FTDI Pin No. | Pin Function (245 FIFO) | Kintex-7 Pin No. |
---|---|---|
16 | D0 | T21 |
17 | D1 | U22 |
18 | D2 | U21 |
19 | D3 | V22 |
21 | D4 | W21 |
22 | D5 | W22 |
23 | D6 | Y21 |
24 | D7 | Y22 |
26 | RXF# | D12 |
27 | TXE# | H15 |
28 | RD# | K17 |
29 | WR# | V14 |
30 | SIWUA | T19 |
32 | CLKOUT | Y16 |
33 | OE# | W16 |
Driver Installation
Windows
This product requires Numato Lab drivers to be installed for proper functioning when used with Windows. The driver can be downloaded from http://productdata.numato.com/assets/downloads/driver/Driver.zip Windows users should download and run the WHQL Certified executable file that will prompt to install the Numato Lab drivers.
Skoll USB Vendor ID | 2A19 |
Skoll USB Product ID | 1006 |
Linux
The Linux ships with the drivers required for Skoll Kintex 7 FPGA Module. It should be enough to run the following two commands in the terminal:
>> sudo modprobe ftdi_sio >> echo 2a19 1006 > /sys/bus/usb-serial/drivers/ftdi_sio/new_id
Powering Up Skoll
Skoll is factory configured to be powered directly from USB port so make sure that you are using a USB port that can power the board properly. It is recommended to connect the board directly to the PC instead using a hub. It is practically very difficult to estimate the power consumption of the board, as it depends heavily on your design and the clock used. XILINX provides tools to estimate the power consumption. In any case if power from USB is not enough for your application, external supply can be applied to the board. Jumper PWRSEL should be set up properly (short pin 1-2) to use the board on external power. Skoll requires three different voltages, a 3.3V, a 1.8V supplies and a 1.3V supply. On-board regulators derive these voltages from the USB/Ext power supply.
Generating Bit Stream for Skoll
The bitstream can be generated for Skoll in Vivado by following the steps below:
Step 1: It is recommended to generate .bin file along with .bit file. Right-click on “Generate Bitstream” under the “Program and Debug” section of the Flow Navigator window and click “Bitstream Settings”.
Step 2: Select “-bin_file” option in the dialog window and click “Apply” and then “OK”.
Step 3: Finally click “Generate Bitstream”.
Programming Skoll Using JTAG
Skoll Kintex 7 FPGA Module features an onboard JTAG connector which facilitates easy reprogramming of SRAM and onboard SPI flash through JTAG programmer like “Xilinx Platform cable USB”. Following steps illustrate how to program FPGA on Skoll using JTAG.
Step 1: By using JTAG cable, connect Xilinx platform cable USB to Skoll and power it up.
Step 2: Open Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.
Step 3: If the device is detected successfully, then select “Program Device” after right clicking on the target device “xc7k70t_0 (1)” as shown below.
Step 4: In the dialog window which opens up, Vivado automatically chooses correct bitstream file if the design was synthesized, implemented and bitstream generated successfully. If needed, browse to the bitstream which needs to be programmed to FPGA. Finally, click “Program”.
Programming QSPI Flash using Vivado
A .bin or .mcs file is required for programming Skoll Kintex 7’s onboard QSPI flash.
Step 1: Open Vivado Project. Click on “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window.
Step 2: If the device is successfully detected, then right-click on the “xc7k70t_0 (1)”. Select “Add Configuration Memory Device” as shown below.
Step 3: Select the memory device “mt25ql128-spi-x1_x2_x4 (which is equivalent to n25q128-3.3v-spi-x1_x2_x4)”, then click OK.
Step 4: After completion of Step 3, a dialog box will open. Click OK.
Step 5: Browse to the working .bin file or the .mcs file (whichever applicable) and click OK to program as shown below. If programming is successful, a confirmation message will be displayed.
Programming Skoll Using Tenagra
For steps on how to program Skoll using Tenagra, refer the Getting started with Tenagra FPGA System Management Software article.
Technical Specifications
Parameter * | Value | Unit |
---|---|---|
Basic Specifications | ||
Number of GPIOs | 158(Max) | |
On-board oscillator frequency (ASEM1-100.000MHZ-LC-T) | 100 | MHz |
DDR3 Capacity | 2 | Gb |
Quad SPI Flash Memory (N25Q128A13ESE40E) | 128 | Mb |
Power supply voltage (External) | 5 - 12 | V |
FPGA Specifications | ||
Internal supply voltage relative to GND | 0.5 to 1.1 | V |
Auxiliary supply voltage relative to GND | 0.5 to 2.0 | V |
Output drivers supply voltage relative to GND | 0.5 to 3.6 | V |
Header Details | ||
Compatible Female socket header | PPTC242LFBN-RC | |
Compatible Male pin header | PRPC024DFAN-RC |
* All parameters considered nominal. Numato Systems Pvt Ltd reserves the right to modify products without notice.
Female socket header : PPTC242LFBN-RC
Male pin header : PRPC024DFAN-RC