Xilinx Spartan 7 FPGA Boards

Saturn Spartan 7 FPGA Module

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Saturn S7  is an upgraded version of Saturn S6 FPGA development board. It is an easy to use FPGA Development board featuring Spartan 7 FPGA. It was created specifically for the development and integration of FPGA-based features into other designs. It is pin compatible with many other FPGA development boards such as Narvi S7, Spartan S6 etc…  Saturn S7 is a great platform for implementing Soft processors such as Microblaze to make it a complete embedded platform. The USB 2.0 host interface based on popular FT2232H offers high bandwidth data transfer and board programming without the need for any external programming adapters. Saturn S7 provides the user with the flexibility of adding their own peripherals through IO Expansion Headers. Additional external reset pin, help the designers to synchronize the signal.

Board Features


  • Product Prototype Development
  • Accelerated computing integration
  • Development and testing of custom-embedded processors
  • Signal Processing
  • Communication devises development
  • An educational tool for Schools and Universities

How to use Saturn Spartan 7 FPGA Module

The following sections describe in detail how to use this module.

Hardware Accessories Required

For easy and fast installation, you may need the following items along with the Saturn S7 module.

  • USB A to Mini B cable
  • DC Power supply
  • A Xilinx Platform Cable USB II compatible JTAG programmer (optional)

Connection Diagram

The following connection diagram should be used for reference only. The schematics are available at the end of this document for detailed information.

USB Interface

The onboard high-speed USB controller helps a PC/Linux/Mac computer to communicate with this module. Use a USB A to Mini B cable to connect with a PC.

By default, the module is powered by USB so make sure not to overcrowd unpowered USB hubs (the picture on the right shows the Mini B connector)

DC Power Supply

The board is configured to use power from the DC power supply by connecting it to the External DC Jack. Please refer to the marking on the board for more details. The external power supply should be in the range of +7 to +12V, with a sufficient current rating.


JTAG Connector

JTAG connector allows the FPGA’s JTAG registers to be accessed using a JTAG cable, compatible with Xilinx Platform Cable USB. Use this header, to attach a JTAG cable for programming and debugging.

Reset Button and LED

Saturn S7 features a Push-button S2 normally used as a “Reset” signal for designs running on FPGA. Push-button S2 is connected to FPGA pin T14Push-button S2 is active-high. This push button can also be used for any other input and is not limited to being used as a Reset signal.

Saturn S7 also features a general-purpose LED D6 which can be used in the RTL design as per requirement. LED D6 is connected to FPGA pin G13LED D6 is active-low.


This device is equipped with a maximum of 130 user IO pins that can be used for various custom applications. All user IOs are length matched and can be used as differential pairs.

Header P4

Pin No. On The Header GPIO Pin Name Spartan-7 (CSGA324) Pin No.Pin No. On The Header GPIO Pin NameSpartan-7 (CSGA324) Pin No. Pin No. On The HeaderGPIO Pin NameSpartan-7 (CSGA324) Pin No. Pin No. On The Header GPIO Pin Name Spartan-7 (CSGA324) Pin No.
A16GPIO_11_ND1B16GPIO_11_P E1C16GPIO_10_NB1D16GPIO_10_PC1
A18GPIO_16_NB4B18GPIO_16_PC4C18GPIO_17_N B3D18GPIO_17_PC3
A20GPIO_22_ND2 B20GPIO_22_PE2 C20GPIO_24_NE3D20GPIO_24_PF3
A21GPIO_31_NH4B21GPIO_31_PH5C21GPIO_32_NJ1D21GPIO_32_P J2

Header P5

Pin No. On The HeaderGPIO Pin NameSpartan-7 (CSGA324) Pin No.Pin No. On The HeaderGPIO Pin NameSpartan-7 (CSGA324) Pin No.Pin No. On The HeaderGPIO Pin NameSpartan-7 (CSGA324) Pin No. Pin No. On The HeaderGPIO Pin NameSpartan-7 (CSGA324) Pin No.
A5GPIO_37_PD18B5GPIO_37_NC18C5GPIO_54_PC12 D5GPIO_54_NC11
A7GPIO_35_PG16B7GPIO_35_N G17C7GPIO_44_PH18D7GPIO_44_N G18
A8GPIO_34_PF14B8GPIO_34_N F15C8GPIO_48_PE16D8GPIO_48_NE17
A15GPIO_42_P R16B15GPIO_42_N R17 C15GPIO_40_PK16D15GPIO_40_NJ16
A16GPIO_62_PP14B16GPIO_62_NP15 C16GPIO_39_PH15D16GPIO_39_NG15
A17GPIO_63_PU15B17GPIO_63_N V16C17GPIO_61_PU17D17GPIO_61_NU18
A18GPIO_56_P U12B18GPIO_56_N V13C18GPIO_45_PH13D18GPIO_45_N H14
A21GPIO_60_P P13B21GPIO_60_NR13C21GPIO_53_PC10D21GPIO_53_PC9
A22GPIO_65_PM14 B22GPIO_65_NN14C22GPIO_55_PV14D22GPIO_55_PV15

* BCBUS0 – BCBUS7 are pins of FTDI FT2232H Dual-Channel USB device.

FT2232H - Spartan-7 (CSGA324) FPGA Connection Details

FTDI Pin No.Pin Function (245 FIFO)Spartan 7 (CSGA324) Pin No.
38FTDI-D0 L13
39FTDI-D1 N13
40FTDI-D2 L17
41FTDI-D3 L18
43FTDI-D4 M17
44FTDI-D5 M18
45FTDI-D6 M16
46FTDI-D7 N18
53FTDI-RD# R18
54FTDI-WR# T18
58FTDI-OE# R12

Driver Installation


This product requires a driver to be installed for proper functioning when used with Windows. The Numato Lab Saturn S7 driver can be downloaded from here. When the driver installation is complete, the module should appear in Tenagra FPGA System Management Software as Saturn Spartan 7 FPGA Module.


The Linux ships with the drivers required for Saturn S7. It should be enough to run the following two commands in the terminal:

>> sudo modprobe ftdi_sio
>> echo 2a19 100F > /sys/bus/usb-serial/drivers/ftdi_sio/new_id

Generating Bitstream Using Vivado

The bitstream can be generated for Saturn S7 in Vivado by following the steps below:

Step 1: It is recommended to generate a .bin bitstream file along with a .bit bitstream file. Click “Bitstream Settings”.

Step 2: Select the “-bin_file*” option in the dialog window and Click OK.

Step 3: Finally click “Generate Bitstream”.

Programming Saturn Using JTAG

Saturn Spartan 7 FPGA Module features an onboard JTAG connector which facilitates easy reprogramming of SRAM and onboard SPI flash through a JTAG programmer like “Xilinx Platform cable USB”. The following steps illustrate how to program FPGA on Saturn using JTAG.

Step 1: By using a JTAG cable, connect Xilinx platform cable USB to Saturn and power it up.

Step 2: Open the Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.

Step 3: If the device is detected successfully, then select “Program Device” after right-clicking on the target device “xc7s50_0 (1)” as shown below.

Step 4: In the dialog window which opens up, Vivado automatically chooses the correct bitstream file if the design was synthesized, implemented and bitstream generated successfully. If needed, browse to the bitstream which needs to be programmed to FPGA. Finally, click “Program”.

As soon as “Program” is clicked, a green-colored DONE LED (D1) on Saturn should light up, indicating that the programming process is going on. This LED will turn off when the configuration is complete.

Generating Memory Configuration File for Saturn S7 using Vivado

Step 1: Open Xilinx Vivado Hardware Manager. Connect the board, click “Generate Memory Configuration File….” from the “Tools” menu. “Write Memory Configuration File” pop up window will open.

Step 2: Select the ‘Format’ and Configuration Memory Part as shown below. Choose the format as MCS/BIN/HEX depending on your requirement. Now, click “OK”.

Step 3: Browse to the path where you wish to save the Configuration File and type the file name as “Saturn_S7_demo.bin” (or any name as per your wish/requirement) to save the memory configuration file (the format of the file may change depending on your “Format”). Select the “Load bitstream files” under the “Options” tab and browse to the “.bit” file we already generated then click “OK” to generate the memory configuration file.

Programming QSPI Flash using Vivado

A .bin or .mcs file is required for programming Saturn’s onboard QSPI flash.

Step 1: Open the Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.

Step 2: If the device is detected successfully, then select “Add Configuration Memory Device” after right-clicking on the target device “xc7s50_0” as shown below.

Step 3: Select the memory device “mt25ql128-spi-x1_x2_x4 (which is equivalent to n25q128-3.3v-spi-x1_x2_x4)”, then click OK.

Step 4: After completion of Step 3 the following dialog box will open. Click OK.

Step 5: Browse to the working .bin file or the .mcs file (whichever is applicable) and click OK to program as shown below. If programming is successful, a confirmation message will be displayed.

Programming Saturn S7 Using Tenagra

For steps on how to program Saturn S7 using Tenagra, refer to the Getting started with Tenagra FPGA System Management Software article.

Technical Specifications

[table “459” not found /]

Mechanical Dimensions

Vivado XDC Constraints


Saturn S7 GPIO Trace Length Details

Saturn S7 GPIO Easy Reference

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