Xilinx Artix 7 FPGA Boards

Mimas Artix 7 FPGA Development Board with DDR SDRAM and Gigabit Ethernet

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Introduction

Mimas A7 is a serious upgrade to our lower-cost Mimas V2 FPGA Development board. Based on Artix 7™ 50T FPGA, Mimas A7 plenty powerful as it is versatile. This FPGA Development Board follows the philosophy of offering a large variety of peripherals on a compact form factor to allow minimal external components to run and evaluate as many designs as possible. Mimas A7 is a great platform for implementing Soft processors such as Microblaze to make it a complete embedded platform. The built-in Gigabit Ethernet offers low latency high bandwidth data transfer to host. The USB 2.0 host interface based on popular FT2232H offers high bandwidth data transfer and board programming without the need for any external programming adapters. Onboard HDMI IN/OUT interfaces along with large DDR3 SDRAM makes Mimas A7 a great platform for video capture, processing, and rendering. The staple peripherals such as switches and seven-segment displays offer great value for learning, prototyping and debugging.

Board Features

  • Device: Xilinx Artix 7 FPGA (XC7A50T-1FGG484C)
  • DDR3: 2Gb DDR3 (MT41J128M16HA-125 or equivalent)
  • Built-in programming interface. No expensive JTAG adapters needed for programming the board
  • Onboard 128Mb flash memory for FPGA configuration storage and custom user data storage
  • High-Speed USB 2.0 interface for On-board flash programming. FT2232H Channel B is dedicated to SPI Flash /JTAG Programming. Channel A can be used for custom applications.
  • 100MHz CMOS oscillator
  • Micro SD card slot for memory expansion
  • Gigabit Ethernet
  • HDMI IN/OUT interfaces
  • High-Speed Serial Interface (GTP) available on mini DisplayPort connectors
  • 8 LEDs, 4 Push Buttons and 8 way DIP switch for user-defined purposes
  • FPGA configuration via JTAG and USB
  • Maximum IOs for user-defined purposes
    • FPGA – 80 IOs (40 professionally length matched Differential Pairs)
    • FT2232H – 8 IOs

Applications

  • Product Prototype Development
  • Accelerated computing integration
  • Development and testing of custom embedded processors
  • Signal Processing
  • Communication devices development
  • Educational tool for Schools and Universities
  • Video processing

How to use Mimas Artix 7 FPGA Development Board

The following sections describe in detail how to use this module.

Hardware Accessories Required

For easy and fast installation, you may need the following items along with the Mimas A7 module.

  • USB A to USB B cable
  • DC Power supply
  • A Xilinx Platform Cable USB II compatible JTAG programmer

Connection Diagram

Revision V2.0:

The following connection diagram should be used for reference only. The schematics are available at the end of this document for detailed information.

Note: Micro SD slot is available at the bottom side of the board.

Revision V3.0:

The following connection diagram should be used for reference only. The schematics are available at the end of this document for detailed information.

 

Note: Micro SD slot is available at the bottom side of the board.

USB Interface

The onboard full-speed USB controller helps a Windows/Linux/Mac computer to communicate with this module. Use a USB A to USB B cable to connect with a PC(the picture on the right shows USB B connector).

 

DC Power Supply

The board is configured to use power from DC power supply by connecting it to the External DC Jack. Please refer to the marking on the board for more details. The external power supply should be in the range of +5 to +12V, with sufficient current rating.

Power Switch

The Power Switch S12 is used to switch on/off the board. Sliding it to ON to supply power to the board from External DC Jack. Sliding it to OFF to power off the board.

For Revision V3.0: There is an option to get powered from the USB also.
The power selection process is discussed in the following section.

Power Select

For Revision V3.0: The Power Select header P2 is used to configure the power source for the board. Connect pins 1 and 2 to use USB power and connect pins 2 and 3 to use the external DC power.

JTAG Connector

JTAG connector allows the FPGA’s JTAG registers to be accessed using a JTAG cable, compatible with Xilinx Platform Cable USB. Use this header, to attach JTAG cable for programming and debugging.

Configuration Mode Switch

FPGA startup configuration mode can be selected using switch M2. Sliding it to ON puts FPGA in the “JTAG” configuration mode. Sliding it to OFF puts the FPGA to the “Master SPI” configuration mode.

PROG_B and Reset Buttons

PROG_B Button

Mimas A7 features a Push-button S1 normally meant to be used as a “PROG_B” signal for configuration reset. Push-button S1 is connected to FPGA pin N12. For enabling manual configuration reset, push-button S1 is connected to GND. The user can reconfigure the FPGA manually, by pressing this push-button S1.

“PROG_B” is an active-low input pin (pulled up with 4.7K external resistor) to the FPGA and it controls the configuration logic. When the PROG_B pin is de-asserted, resets the FPGA and initializes the new configuration.

Reset Button

Mimas A7 features a Push-button S3 normally meant to be used as a “Reset” signal for designs running on FPGA. Push-button S3 is connected to FPGA pin M2. Push-button S3 is active-high. This pushbutton can also be used for any other input and is not just limited to be used as a Reset signal.

LED, Push Button and Dip Switch

Mimas A7 Development Board has four push-button switches, an eight-position DIP switch and eight LEDs for human interaction. All switches are directly connected to Artix 7 FPGA and can be used in your design with minimal effort.

Micro SD

The Mimas A7 board features an onboard Micro SD adapter. You can add the data logging, media storage, and other file storage by installing Micro SD Card and appropriate IP. The connection between FPGA and Micro SD Card is shown below

7-Segment LED Display

Revision V2.0:

This version of the board features three 7-segment LED display multiplexed for low pin count operation. Each module can be separately turned on and off with the three switching transistors.

Note: All signals (a, b, c, d, e, f, g, dot, enable 1, enable 2, enable 3) used for controlling 7-Segment display are active-low signals. So, for example, for displaying “8” in display-2, users need to drive Enable 2 to 0 as well as drive signals a, b, c, d, e, f to 0. All other signals need to be driven to 1.

Revision V3.0:

This version of the board features four 7-segment LED displays. Each module can be separately turned on and off with the four switching transistors.

Note: All signals (a, b, c, d, e, f, g, dot, enable 1, enable 2, enable 3, enable 4) used for controlling 7-Segment display are active-low signals. So, for example, for displaying “8” in display-2, users need to drive Enable 2 to 0 as well as drive signals a, b, c, d, e, f to 0. All other signals need to be driven to 1.

DVI-D/HDMI

Onboard HDMI IN/OUT interfaces along with large DDR3 SDRAM makes Mimas A7 a great platform for video capture, processing, and rendering. The HDMI IN/OUT interfaces are buffered using HDMI buffer IP4776CZ38 for better signal strength and signal integrity.

 

Mini Display Port

Mimas A7 includes onboard mini DisplayPort (miniDP or mDP) IN/OUT connectors and it is a miniaturized version of DisplayPort digital display technology. The mini DisplayPort is having four lanes along with auxiliary channel and a hot plug detect the signal. High-Speed Serial Interface (GTP) available on mini DisplayPort connectors.

Revision V2.0:

Revision V3.0:

 

Gigabit Ethernet

Mimas A7 Development Board features RTL8211E, a highly integrated Ethernet transceiver from Realtek that comply with 10BASE-T, 100BASE-TX, and 1000Base-T IEEE 802.3 standards. It supports communication with the Ethernet MAC layer via standard RGMII interface. RTL8211E-VB implements auto-negotiation to automatically determine the best possible speed and mode of operation. It contains a high-performance 10/100/1000T transceiver and the RGMII interface supports 1000Mbps (1Gbps) operation.

 

JTAG/SPI Configuration on FT2232H Channel B

Channel B of FT2232H can be connected to the SPI bus that connects the SPI Flash chip to the FPGA or to the JTAG pins of the FPGA. When FT2232H channel B is connected to FPGA JTAG, the JTAG signals can be accessed directly through FT2232H. This is the default configuration set when Mimas A7 is shipped.

Please see the tables below for information about selecting SPI or JTAG for FT2232H channel B.

Solder Jumpers P3

Jumper Configuration for SPIJumper Configuration for JTAG
1 - 21 - 3
5 - 64 - 6

Solder Jumpers P8

Jumper Configuration for SPIJumper Configuration for JTAG
1 - 21 - 3
5 - 64 - 6

By default, Mimas A7 ships with the solder jumpers in JTAG configuration. During normal usage, users should not change these jumpers from their factory default configuration.

GPIOs

This device is equipped with a maximum of 80 user IO pins that can be used for various custom applications. All user IOs are length matched and can be used as differential pairs.

Header P12

Pin No. On The HeaderGPIO Pin NameArtix-7 (FGG484) Pin No.Pin No. On The HeaderGPIO Pin NameArtix-7 (FGG484) Pin No.
A1VINB1VIN
A2VINB2VIN
A3GNDB3GND
A4GPIO_1_PJ20B4GPIO_1_NJ21
A5GPIO_2_PK21B5GPIO_2_NK22
A6GPIO_3_PH20B6GPIO_3_NG20
A7GPIO_4_PJ19B7GPIO_4_NH19
A8GNDB8GND
A9VCC_VADJB9VCC_VADJ
A10GPIO_5_PJ22B10GPIO_5_NH22
A11GPIO_6_PK18B11GPIO_6_NK19
A12GPIO_7_PL19B12GPIO_7_NL20
A13GPIO_8_PM21B13GPIO_8_NL21
A14GNDB14GND
A15VCC_VADJB15VCC_VADJ
A16GPIO_9_PN22B16GPIO_9_NM22
A17GPIO_10_PN20B17GPIO_10_NM20
A18GPIO_11_PM18B18GPIO_11_NL18
A19GPIO_12_PN18B19GPIO_12_NN19
A20GNDB20GND
A21VCC_VADJB21VCC_VADJ
A22GPIO_13_PH17B22GPIO_13_NH18
A23GPIO_14_PG17B23GPIO_14_NG18
A24GNDB24GND
A25GPIO_15_PG15B25GPIO_15_NG16
A26GPIO_16_PJ15B26GPIO_16_NH15
A27GNDB27GND
A28GPIO_17_PK13B28GPIO_17_NK14
A29GPIO_18_PM13B29GPIO_18_NL13
A30GNDB30GND
A31GPIO_19_PJ14B31GPIO_19_NH14
A32GPIO_20_PH13B32GPIO_20_NG13
A33GNDB33GND
A34VpL10B34VnM9
A35VBATE12B35RESETM2
A36GNDB36GND
A37SPI_CS_NT19B37SPI_DQ3R21
A38SPI_DQ1R22B38SPI_SCKL12
A39SPI_DQ2P21B39SPI_DQ0P22
A40GNDB40GND

Header P13

Pin No. On The Header GPIO Pin NameArtix-7 (FGG484) Pin No. Pin No. On The Header GPIO Pin NameArtix-7 (FGG484) Pin No.
A1VINB1VIN
A2VINB2VIN
A3GNDB3GND
A4GPIO_21_PF19B4GPIO_21_NF20
A5GPIO_22_PE19B5GPIO_22_ND19
A6GPIO_23_PD20B6GPIO_23_NC20
A7GPIO_24_PC22B7GPIO_24_NB22
A8GNDB8GND
A9VCC_VADJB9VCC_VADJ
A10GPIO_25_PF18B10GPIO_25_NE18
A11GPIO_26_PC18B11GPIO_26_NC19
A12GPIO_27_PD17B12GPIO_27_NC17
A13GPIO_28_PB20B13GPIO_28_NA20
A14GNDB14GND
A15VCC_VADJB15VCC_VADJ
A16GPIO_29_PB17B16GPIO_29_NB18
A17GPIO_30_PA18B17GPIO_30_NA19
A18GPIO_31_PE16B18GPIO_31_ND16
A19GPIO_32_PB15B19GPIO_32_NB16
A20GNDB20GND
A21VCC_VADJB21VCC_VADJ
A22GPIO_33_PA15B22GPIO_33_NA16
A23GPIO_34_PC14B23GPIO_34_NC15
A24GNDB24GND
A25GPIO_35_PA13B25GPIO_35_NA14
A26GPIO_36_PC13B26GPIO_36_NB13
A27GNDB27GND
A28GPIO_37_PD14B28GPIO_37_ND15
A29GPIO_38_PE13B29GPIO_38_NE14
A30GNDB30GND
A31GPIO_39_PF13B31GPIO_39_NF14
A32GPIO_40_PF16B32GPIO_40_NE17
A33GNDB33GND
A34TCKV12B34TDOU13
A35TDIR13B35TMST13
A36GNDB36GND
A37INIT_BU12B37PROGRAM_BN12
A38DONEG11B38M0U11
A39M1U10B39M2U9
A40GNDB40GND

FT2232H - Artix-7 (FGG484) FPGA Connection Details

FTDI Pin No.Pin Function (245 FIFO)Artix-7 (FGG484) Pin No.
16FTDI-D0Y22
17FTDI-D1Y21
18FTDI-D2AB22
19FTDI-D3AA21
21FTDI-D4AB21
22FTDI-D5AA20
23FTDI-D6AB20
24FTDI-D7AA18
26FTDI-RXF#W21
27FTDI-TXE#V22
28FTDI-RD#AA19
29FTDI-WR#W22
30FTDI-SIWUAU21
32FTDI-CLKOUTY18
33FTDI-OE#T21

Driver Installation

Windows

This product requires a driver to be installed for proper functioning when used with Windows. The Numato Lab Mimas A7 driver can be downloaded from http://productdata.numato.com/assets/downloads/driver/Driver.zip. When the driver installation is complete, the module should appear in Mimas A7 Flash Config Tool as Mimas Artix-7 FPGA Development Board.

 

Linux

The Linux ships with the drivers required for Mimas A7. It should be enough to run the following two commands in the terminal:

>> sudo modprobe ftdi_sio
>> echo 2a19 1009 > /sys/bus/usb-serial/drivers/ftdi_sio/new_id

Generating Bitstream for Mimas A7

The bitstream can be generated for Mimas A7 in Vivado by following the steps below:

Step 1: It is recommended to generate a .bin bitstream file along with .bit bitstream file. Click “Bitstream Settings”.

Step 2: In the window that pops up, select the “-bin_file*” option and click OK.

Step 3: Finally click “Generate Bitstream”.

Powering UP Mimas A7

Mimas A7 can be powered directly from an external supply.  It is practically very difficult to estimate the power consumption of the board, as it depends heavily on your design and the clock used. XILINX provides tools to estimate power consumption. Mimas A7 requires three different voltages, a 3.3V, a 1.8V supply, and a 1.2V supply. On-board regulators derive these voltages from the Ext power supply.

Configuring Mimas A7

The Mimas Artix -7 Development Board can be configured by two methods,

  1. Using the Tenagra application.
  2. Using the Xilinx Platform Cable USB II or any compatible JTAG hardware

Configuring Mimas A7 using Tenagra

Mimas A7 FPGA Board can be configured using Numato Lab’s Tenagra application. Using Tenagra we can program bitstream files to the SRAM and SPI Flash. Mimas A7 has an onboard FTDI FT2232H device which facilitates easy reprogramming of onboard SPI flash through the USB interface. The FTDI receives bitstream from the host application and programs it into the SPI Flash. The Numato Lab’s Tenagra application can be downloaded from here. The steps below show how to program the Mimas A7 FPGA Board in Tenagra.

Step 1: Open the Tenagra application. Click “Refresh” if Mimas A7 FPGA Board is not detected automatically. And select the Mimas A7 FPGA Board in the list of boards section.

Step 2: Click on the “Program Device” tab to program the board.

                                                    

Step 3: Then to add Configuration Files click on “Add a configuration from your computer”.

Programming to SRAM

Select the bitstream file (.bit or .bin) which you wish to program on the board and select the “SRAM” tab and then click on the “Run” tab. This will program the board with the selected bitstream file.

Programming to SPI Flash

Select the bitstream file (only .bin) which you wish to program on the board and select the “Flash Memory” tab and then click on the “Run” tab. This will Configure, Erase, Program and Verify the board with the selected binary file.

Configuring Mimas A7 using JTAG

Mimas A7 – Artix-7 Development Board features an onboard JTAG connector which facilitates easy reprogramming of SRAM and on-board SPI flash through JTAG programmer like “XILINX Platform-cable usb”. Programming Mimas A7 using JTAG requires “XILINX Vivado Hardware Manager” software which is bundled with XILINX Vivado Design Suite. To program the SPI flash we need a “.mcs/.bin” file needs to be generated from the “.bit” file. Steps for generating “.mcs/.bin” file are as below. Programming FPGA SRAM does not require a “.mcs/.bin” file to be generated.

Generating Memory Configuration file for Mimas A7 using Vivado

The screenshots showed in the following steps are captured from the Vivado Design Suite 2018.2.

Step 1: Open Xilinx Vivado Hardware Manager. Connect the board, click “Generate Memory Configuration File….” from the “Tools” menu. “Write Memory Configuration File” pop up window will open.

Step 2: Select the ‘Format’ and Configuration Memory Part as shown below. Choose the format as MCS/BIN/HEX depends on your requirements. Now, click “OK”.

Step 3: Browse the path and type the file name as “sample.mcs” to save the memory configuration file (The format of the file may change depends on your “Format”). Select the “Load bitstream files” under the ”Options” tab and browse the “.bit” file we already generated then click “OK” to generate the memory configuration file.

 

Programming QSPI Flash using Vivado

A .bin or .mcs file is required for programming Mimas A7’s onboard QSPI flash.

Step 1: Open the Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.

Step 2: If the device is detected successfully, then select “Add Configuration Memory Device” by right click on the target device “xc7a50t_0” as shown below.

Step 3: Select the memory device “mt25ql128-spi-x1_x2_x4 (which is equivalent to n25q128-3.3v-spi-x1_x2_x4)”, then click OK.

Step 4: After completion of Step 3 the following dialog box will open. Click OK.

Step 5: Browse to the working .bin file or the .mcs file (whichever applicable) and click OK to program as shown below. If programming is successful, a confirmation message will be displayed.

Programming FPGA using Vivado

Mimas A7 – Artix-7 FPGA Development Board features an onboard JTAG connector that facilitates easy reprogramming of SRAM and onboard SPI flash through JTAG programmer like “Xilinx Platform cable USB”. The following steps illustrate how to program FPGA on Mimas A7 using JTAG.

Step1: By using JTAG cable, connect Xilinx platform cable USB to Mimas A7 and power it up.

Step2: Open the Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.

Step3: If the device is detected successfully, then select “Program Device” by right click on the target device “xc7a50t_0” as shown below.

 

Step4: In the dialog window which opens up, Vivado automatically chooses the correct bitstream file if the design was synthesized, implemented and bitstream generated successfully. If needed, browse to the bitstream which needs to be programmed to FPGA. Finally, click “Program”.

As soon as “Program” is clicked, a red-colored LED (D1) on Mimas A7 should light up, indicating that the programming process is going on. This LED will turn off when the configuration is complete.

Technical Specifications

Parameter *ValueUnit
Basic Specifications
Number of GPIOs80
On-board oscillator frequency (ASEM1-100.000MHZ-LC-T)100MHz
DDR3 SDRAM (MT41J128M16HA - 125 or Equivalent)2Gb
Quad SPI Flash Memory (N25Q128A13ESE40E)128Mb
Power supply voltage (USB or External)5 - 12V
Number of LEDs8
Number of Push Buttons4
Number of Dip Switches8
FPGA Specifications
Internal supply voltage relative to GND -0.5 to 1.1V
Auxiliary supply voltage relative to GND -0.5 to 2.0V
Output drivers supply voltage relative to GND -0.5 to 3.6V

* All parameters considered nominal. Numato Systems Pvt Ltd reserves the right to modify products without notice.

Physical Dimensions

Revision V2.0:

Revision V3.0:

Vivado XDC Constraints

Schematics

Revision V2.0: Mimas A7 Schematics

Revision V3.0: Mimas A7 Schematics

Mimas A7 GPIO Easy Reference

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