Xilinx Artix 7 FPGA Boards

Tagus Artix 7 PCI Express Development Board

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Introduction

Tagus is an easy to use FPGA Development Board featuring Xilinx Artix-7 FPGA with x1 PCIe interface, Trusted Platform Module (ATXXXXXX) , Dual SFP+ cages, and 2Gb DDR3 SDRAM. This board features Xilinx XC7A100T– FGG484 FPGA. The board features Low Pin Count (LPC) high-speed FMC connector conforming to ANSI/VITA 57.1 Standard for the purpose of adding additional features to the board by using custom or commercial off-the-shelf daughter boards.

Applications:

  • Parallel Processing and Accelerators
  • Product Prototype Development
  • Development and Testing of custom embedded processors
  • Signal Processing
  • Communication Devices Development
  • Data Acquisition
  • Educational tool for Schools and Universities

Board features

  • FPGA: Artix-7 XC7A100T in -1 FGG484 package
  • 1 lane PCIe Gen1.0 (2.5GT/s)
  • DDR3: 2Gb DDR3 (MT41J128M16HA-125:K or equivalent)
  • 128 Mb QSPI flash memory (N25Q128A13ESE40E) for Configuration and optional data storage
  • USB to UART serial converter
  • 1 x 100MHz CMOS oscillator
  • Maximum 68 IOs for user-defined purposes on ANSI/VITA 57.1 Standard compliant FMC LPC connector
  • 1x GTP lanes upto 3.75Gbps on ANSI/VITA 57.1 Standard compliant FMC LPC connector
  • 1 RGB LED for custom use
  • 1x Trusted Platform Module (ATXXXXXX )
  • Dual SFP+ Cages
  • MicroSD adapter for bulk data storage
  • Onboard voltage regulators for single power rail operation
  • Can be powered from PCIe slot or from an external power supply
  • JTAG header for programming and debugging
  • All differential pairs are length matched on the board

How to Use Tagus Artix 7 PCI Express Development Board

Hardware Accessories Required

Along with the board, following accessories are required for easy and fast installation.

  1. 12 V DC Power Supply (not needed if the board is inserted into a motherboard)
  2. A Xilinx Platform Cable USB II compatible JTAG programmer
  3. USB Male A to Micro B cable (optional)

Connection Diagram

The following diagram should be used as a reference only. For detailed information, see Tagus’s schematics and mechanical dimensions at the end of this page. 

Power

The Tagus requires +12V power supply to function properly. Tagus can be supplied power in 3 ways:

  1. External +12V power via DC Barrel Jack Connector
  2. External +12V power via 3×2 PCIe Power Connector.
  3. Via Motherboard when the Tagus is plugged into a PCIe slot that is capable of powering the Tagus

The current requirement for this board largely depends on your application. The Tagus module works on power supply of 1 A of current for simple applications. However, a power supply 2 A of current is recommended for a smooth running of bigger applications. Please consult FPGA data sheet for more details on power requirements.

USB Serial Bridge

USB Serial Bridge can be used to interface with PC using a serial interface. It is primarily used to output debug information or as a console for the design running on the board. A Micro USB type cable should be used to connect Tagus to host PC. An FT234 is used as the USB-Serial Bridge IC. The USB-Serial interface features hardware flow control using RTS and CTS signals, in case users need to use hardware flow control. An extra signal CBUS0 from FT234X is also connected to FPGA, which can be used as host-controlled GPIO or can be used for other purpose.

JTAG

JTAG connector allows the FPGA’s JTAG registers to be accessed using a JTAG cable compatible with Xilinx Platform Cable USB. Use this header to attach JTAG cable for programming and debugging.

RGB LED

Tagus features one RGB LED which can be used for custom or debug purposes. The LED is wired in active-low configuration.

Micro SD

The Tagus board features an onboard Micro SD adapter. You can add the data logging, media storage, and other file storage by installing Micro SD Card and appropriate IP. The connection between FPGA and Micro SD Card is shown below

JTAG Chain Configuration

JTAG chain can be modified using jumper P7 near JTAG header.

Following diagram shows JTAG chain configuration:

Tagus has automatic FMC detection using PRSNT_M2C_L signal from FMC. Normally, when an FMC board is not connected, the Tagus’s onboard circuitry will automatically close the JTAG chain keeping FMC out from the chain, so no user intervention is required. But, still jumper P7 has been provided as a redundant backup to close the JTAG chain in case the automatic circuitry doesn’t work due to non-compliant FMC modules connected to the Tagus, or any or unforeseen reasons.

Configuration Mode Switch

FPGA startup configuration mode can be selected using switch S2.

Sliding it to ON puts FPGA in “JTAG” configuration mode. Sliding it to OFF puts the FPGA to “Master SPI” configuration mode.

PROG_B and Reset Buttons

PROG_B Button

Tagus features a Push-button S1 normally meant to be used as “PROG_B” signal for configuration reset. Push-button S1 is connected to FPGA pin N12. For enabling manual configuration reset, push-button S1 connected to GND. The user can reconfigure the FPGA manually, by pressing this push-button S1.

“PROG_B” is active-low input pin (pulled up with 4.7K external resistor) to the FPGA and it controls the configuration logic. When PROG_B pin is de-asserted, resets the FPGA and initializes the new configuration.

Reset Button

Tagus features a Push-button S3 normally meant to be used as “Reset” signal for designs running on FPGA. Push-button S3 is connected to FPGA pin P17. Push-button S3 is active-high. This pushbutton can also be used for any other input and is not just limited to be used as a Reset signal.

FMC VADJ Power Supply

VADJ Power Supply for FMC Bank A is configurable via jumpers J2. Following are the jumper configurations for different voltages for VADJ supply.

Jumper on J2 HeaderFMC VADJ Power Supply (Volts)
No jumper anywhere3.3
1 - 22.5
3 - 41.8
5 - 61.5
7 - 81.2

PCIe x1 Edge Connector

PCI Express 1.0 1-lane edge-connector on Tagus can be used to interface with host PCs via PCI Express protocol. Each lane is capable of 2.5 GT/s resulting in maximum theoretical data transfer rate of 250 MB/s for a single lane.

PCI Express x1 Edge Connector

Signal NameArtix-7 (FGG484) Pin
PCIE_TX0_PB4
PCIE_TX0_NA4
PCIE_RX0_PB8
PCIE_RX0_NA8
PCIE_CLK0_PF6
PCIE_CLK0_NE6
PCIE_PERSTW20

SFP+ Cages

Tagus features two SFP+ cages (Small form-factor hot-pluggable optical module transceivers), which can be used for optical fiber communication.

Signal NameArtix-7 (FGG484) Pin
SFP1
SFP1_RX_PB10
SFP1_RX_NA10
SFP1_TX_PB6
SFP1_TX_NA6
SFP1_TX_FLTP20
SFP1_TX_DSBLV22
SFP1_MOD_ABST20
SFP1_RS0AA21
SFP1_RS1AB22
SFP1_RX_LOSAB21
SFP1_SDAAA18
SFP1_SCLAB18
SFP2
SFP2_RX_PD9
SFP2_RX_NC9
SFP2_TX_PD7
SFP2_TX_NC7
SFP2_TX_FLTU20
SFP2_TX_DSBLP15
SFP2_MOD_ABSR16
SFP2_RS0P16
SFP2_RS1N15
SFP2_RX_LOSR17
SFP2_SDAU17
SFP2_SCLU18

FMC Connector

Tagus features a high speed, low pin-count FMC connector which can be used to provide additional features and capabilities to it using custom or commercial off-the-shelf daughter boards. Apart from IOs, 1 GTP lane is available via FMC connector for custom purpose.

FMC Banks A to D

AFMC Pin NameArtix-7 FGG484 PinBFMC Pin NameArtix-7 FGG484 PinCFMC Pin NameArtix-7 FGG484 PinDFMC Pin NameArtix-7 FGG484 Pin
C1GNDGNDD1PG_C2MV20G1GNDGNDH1VREF_A_M2CNC
C2DP0_C2M_PD5D2GNDGNDG2CLK1_M2C_PK18H2PRSNT_M2C_LW17
C3DP0_C2M_NC5D3GNDGNDG3CLK1_M2C_NK19H3GNDGND
C4GNDGNDD4GBTCLK0_M2C_PF10G4GNDGNDH4CLK0_M2C_PC18
C5GNDGNDD5GBTCLK0_M2C_NE10G5GNDGNDH5CLK0_M2C_NC19
C6DP0_M2C_PD11D6GNDGNDG6LA00_CC_PD17H6GNDGND
C7DP0_M2C_NC11D7GNDGNDG7LA00_CC_NC17H7LA02_PE19
C8GNDGNDD8LA01_CC_PJ19G8GNDGNDH8LA02_ND19
C9GNDGNDD9LA01_CC_NH19G9LA03_PF13H9GNDGND
C10LA06_PJ22D10GNDGNDG10LA03_NF14H10LA04_PF18
C11LA06_NH22D11LA05_PL19G11GNDGNDH11LA04_NE18
C12GNDGNDD12LA05_NL20G12LA08_PF16H12GNDGND
C13GNDGNDD13GNDGNDG13LA08_NE17H13LA07_PB20
C14LA10_PH20D14LA09_PN22G14GNDGNDH14LA07_NA20
C15LA10_NG20D15LA09_NM22G15LA12_PC14H15GNDGND
C16GNDGNDD16GNDGNDG16LA12_NC15H16LA11_PA18
C17GNDGNDD17LA13_PM18G17GNDGNDH17LA11_NA19
C18LA14_PK21D18LA13_NL18G18LA16_PE13H18GNDGND
C19LA14_NK22D19GNDGNDG19LA16_NE14H19LA15_PF19
C20GNDGNDD20LA17_CC_PB17G20GNDGNDH20LA15_NF20
C21GNDGNDD21LA17_CC_NB18G21LA20_PE16H21GNDGND
C22LA18_CC_PJ20D22GNDGNDG22LA20_ND16H22LA19_PD20
C23LA18_CC_NJ21D23LA23_PN18G23GNDGNDH23LA19_NC20
C24GNDGNDD24LA23_NN19G24LA22_PD14H24GNDGND
C25GNDGNDD25GNDGNDG25LA22_ND15H25LA21_PC22
C26LA27_PM21D26LA26_PN20G26GNDGNDH26LA21_NB22
C27LA27_NL21D27LA26_NM20G27LA25_PB15H27GNDGND
C28GNDGNDD28GNDGNDG28LA25_NB16H28LA24_PB21
C29GNDGNDD29FMC_TCKV12G29GNDGNDH29LA24_NA21
C30FMC_SCL
N13D30FPGA_TDO_FMC_TDIU13G30LA29_PC13H30GNDGND
C31FMC_SDA
N14D31FMC_TDOR13G31LA29_NB13H31LA28_PE22
C32GNDGNDD323P3VAUXVCC3V3G32GNDGNDH32LA28_ND22
C33GNDGNDD33FMC_TMST13G33LA31_PA15H33GNDGND
C34GA0GNDD34TRST_LNCG34LA31_NA16H34LA30_PE21
C3512P0VVCC12V0D35GA1GNDG35GNDGNDH35LA30_ND21
C36GNDGNDD363P3VVCC3V3G36LA33_PA13H36GNDGND
C3712P0VVCC12V0D37GNDGNDG37LA33_NA14H37LA32_PG21
C38GNDGNDD383P3VVCC3V3G38GNDGNDH38LA32_NG22
C393P3VVCC3V3D39GNDGNDG39VADJVCC_VADJH39GNDGND
C40GNDGNDD403P3VVCC3V3G40GNDGNDH40VADJVCC_VADJ

USB-Serial Bridge Driver

Installing Driver for USB Serial Converter on Windows

This board requires a driver to be installed to use USB serial converter, for board’s proper functioning when used with Windows. Ideally, Windows should automatically search and install the correct driver for Tagus via Windows Update. For manual installation, the FTDI VCP drivers are available for download from http://www.ftdichip.com/.

Generating Bitstream Using Vivado

The PCI Express specification requires cards to be ready for link training within 100 ms after the host PC’s power supply is stable.

Following constraints need to be added to the xdc file before synthesizing, implementing and generating a bitstream for a PCI Express design. These can be safely ignored if PCI Express interface is not used in the design.

set_property BITSTREAM.CONFIG.CONFIGRATE 66 [current_design]
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]

Step 1: It is recommended to generate .bin bitstream file along with .bit bitstream file. Click “Bitstream Settings”.

Step 2: Select “-bin_file*” option in the dialog window and Click OK.

Step 3: Finally click “Generate Bitstream”.

Programming Tagus Using JTAG

Tagus Artix-7 PCI Express FPGA Board features an onboard JTAG connector which facilitates easy reprogramming of SRAM and onboard SPI flash through JTAG programmer like “Xilinx Platform cable USB”. Following steps illustrate how to program FPGA on Tagus using JTAG.

Step1: By using JTAG cable, connect Xilinx platform cable USB to Tagus and power it up.

Step2: Open Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.

Step3: If the device is detected successfully, then select “Program Device” by right click on the target device “xc7a100t_0” as shown below.

Step4: In the dialog window which opens up, Vivado automatically chooses correct bitstream file if the design was synthesized, implemented and bitstream generated successfully. If needed, browse to the bitstream which needs to be programmed to FPGA. Finally, click “Program”.

 

As soon as “Program” is clicked, a red colored LED (D1) on Tagus should light up, indicating that programming process is going on. This LED will turn off when the configuration is complete.

Programming QSPI Flash using Vivado

A .bin or .mcs file is required for programming Tagus’s onboard QSPI flash.

Step 1: Open Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.

Step 2: If the device is detected successfully, then select “Add Configuration Memory Device” by right click on the target device “xc7a100t_0” as shown below.

Step 3: Select the memory device “mt25ql128-spi-x1_x2_x4 (which is equivalent to n25q128-3.3v-spi-x1_x2_x4)”, then click OK.

Step 4: After completion of Step 3 the following dialog box will open. Click OK.

Step 5: Browse to the working .bin file or the .mcs file (whichever applicable) and click OK to program as shown below. If programming is successful, a confirmation message will be displayed.

Technical Specifications

Parameter *ValueUnit
Basic Specifications
Number of GPIOs (Max) 68
On-board Oscillator Frequency (ASEM1-
100.000MHZ-LC-T)
100 (x1)MHz
DDR3 (MT41J123M16HA-125)2 (x1)Gb
SPI Flash Memory (N25Q128A13ESE40E)128Mb
IIC EEPROM (24AA02E48T-I/OT)2Kb
FPGA Specifications
Internal supply voltage relative to GND-0.5 to 1.1V
Auxiliary supply voltage relative to GND -0.5 to 2.0V
Output drivers supply voltage relative to GND -0.5 to 3.6 V
Connector Header Specifications (ASP-134603-01)
Number of Positions160
Number of Rows 4
Height above Board6.55mm
Pitch1.27mm
Mated Receptacle on Tagus moduleASP-134603-01

Mechanical Dimensions

Tagus FMC Easy Reference

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