Xilinx Spartan 6 FPGA Boards

Callisto Spartan 6 USB 3.1 FPGA Module

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Introduction

Callisto S6 is an easy to use FPGA Development board featuring the Xilinx Spartan 6 FPGA with 2Gb DDR3 SDRAM. This board contains the Xilinx XC6SLX150– FGG676 FPGA. The high-speed USB 3.1 interface (USB-C connector) provides fast communication interface between FPGA and host PC. The Development board also provides easy access to JTAG signals on a standard Xilinx Platform Cable compatible header. Callisto S6 provides the user the flexibility of adding their own peripherals through IO Expansion Headers.

Board Features

  • FPGA: Spartan XC6SLX150 in FGG676 package
  • DDR3: 2Gb DDR3 (MT41J128M16HA-125:K or equivalent)
  • Flash memory: 128 Mb Quadbit SPI flash memory (N25Q128A13ESE40E)
  • 2 x 100MHz CMOS oscillator
  • USB 3.1 Gen1 @5Gbps (USB Type-C connector)
  • JTAG header for programming and debugging.
  • 12V DC power supply
  • A Push Button for the reset pin
  • 284 IOs for user-defined purposes
  • Onboard voltage regulators for single power rail operation

Applications

  • Signal Processing
  • Product Prototype Development
  • Communication devices development
  • Educational tool for Schools and Universities
  • Development and testing of custom embedded processors
  • Accelerated Computing Integration

How to Use Callisto Spartan 6 USB 3.1 Development Board

The following sections describe in detail how to use this module.

Components/Tools Required

Along with the module, you may need the accessories listed below for easy and fast installation:

  1. 12 V DC Power Supply.
  2. USB A to USB-C cable (Optional).
  3. A Xilinx Platform Cable USB II compatible JTAG programmer

Connection Diagram

This diagram should be used as a reference only. For detailed information, see Callisto S6’s schematics and mechanical dimensions at the end of this page. Details of individual connectors are as shown below.

USB Interface

This super speed USB 3.1 interface (USB-C connector) is used to help the host PC to communicate with the module at a very high speed (5Gbps). A USB-A to USB-C cable is used to connect the module to the host PC. It is primarily used to output debug information or as a console for the design running on the board. (the picture on the right shows USB-C connector).

DC Power Supply

By default, the board is configured to use +5V supply from USB. So an external power is not required unless USB port is unable to supply enough current. USB 3.1 ports are only capable of providing enough current for the module for small designs which require less power. The current requirement for this board largely depends on your application. Please consult FPGA data sheet for more details on power requirements. If for any reason, an external power supply needs to be used for the board, connect the DC power supply. Please refer to the marking on the board for more details. The external power supply should be in the range of +5 to +12V, with sufficient current rating.

Reset Button

Callisto S6 features a Push-button S1 normally meant to be used as “Reset” signal for designs running on FPGA. Push-button S1 is connected to FPGA pin A23. Push-button S1 is active-high. This pushbutton can also be used for any other input and is not just limited to be used as a Reset signal.

JTAG Connector

JTAG connector allows the FPGA’s JTAG registers to be accessed using a JTAG cable, compatible with Xilinx Platform Cable USB. Use this header, to attach JTAG cable for programming and debugging.

GPIOs

This device is equipped with a maximum of 284 user IO pins that can be used for various custom applications. All user IOs are length matched and can be used as differential pairs.

Header P1

PIN NO. ON HEADERSpartan 6 (XC6SLX150-1FGG676)PIN NO. ON HEADERSpartan 6 (XC6SLX150-1FGG676)PIN NO. ON HEADERSpartan 6 (XC6SLX150-1FGG676)PIN NO. ON HEADERSpartan 6 (XC6SLX150-1FGG676)PIN NO. ON HEADERSpartan 6 (XC6SLX150-1FGG676)PIN NO. ON HEADERSpartan 6 (XC6SLX150-1FGG676)
A1VINB1VINC1VIND1VINE1VINF1VIN
A2GNDB2GNDC2GNDD2GNDE2GNDF2GND
A3GNDB3B22C3A22D3GNDE3E20F3D20
A4C21B4A21C4GNDD4E16E4F16F4GND
A5GNDB5B20C5A20D5GNDE5H15F5J15
A6A19B6C19C6GNDD6C16E6D16F6GND
A7GNDB7A18C7B18D7GNDE7F15F7G16
A8A17B8C17C8GNDD8C14E8D14F8GND
A9GNDB9A16C9B16D9GNDE9K15F9J16
A10E14B10D15C10GNDD10J14E10G14F10GND
A11GNDB11A14C11B14D11GNDE11G13F11F14
A12E12B12F12C12GNDD12J13E12K14F12GND
A13GNDB13C13C13A13D13GNDE13F13F13D13
A14B12B14A12C14GNDD14J12E14H13F14GND
A15GNDB15A11C15C11D15GNDE15D12F15C12
A16F11B16D11C16GNDD16G11E16H12F16GND
A17GNDB17B10C17A10D17GNDE17J11F17K12
A18C9B18A9C18GNDD18H9E18H10F18GND
A19GNDB19B8C19A8D19GNDE19D10F19C10
A20A7B20C7C20GNDD20E10E20F10F20GND
A21GNDB21D7C21E8D21GNDE21D8F21C8
A22B6B22A6C22GNDD22E9E22F9F22GND
A23GNDB23A5C23C5D23GNDE23D5F23E6
A24B4B24A4C24GNDD24G9E24F8F24GND
A25GNDB25G8C25F7D25GNDE25D6F25C6
A26G7B26H8C26GNDD26K9E26J10F26GND
A27GNDB27G5C27G6D27GNDE27K8F27L8
A28E5B28F5C28GNDD28H7E28J7F28GND
A29GNDB29E3C29E4D29GNDE29K6F29K7
A30C3B30C4C30GNDD30H5E30H6F30GND
A31GNDB31B1C31B2D31GNDE31G3F31G4
A32D1B32D3C32GNDD32C1E32C2F32GND
A33GNDB33F1C33F3D33GNDE33E1F33E2
A34H1B34H3C34GNDD34G1E34G2F34GND
A35GNDB35J1C35J2D35GNDE35J3F35J4
A36K1B36K3C36GNDD36K5E36J5F36GND
A37GNDB37L1C37L2D37GNDE37L9F37K10
A38N1B38N2C38GNDD38M1E38M3F38GND
A39GNDB39GNDC39GNDD39GNDE39GNDF39GND
A40VADJ_B5B40VADJ_B4C40VADJ_B0D40VBATTE40VCC3V3F40VCC3V3

Header P2

PIN NO. ON HEADERSpartan 6 (XC6SLX150-1FGG676)PIN NO. ON HEADERSpartan 6 (XC6SLX150-1FGG676)PIN NO. ON HEADERSpartan 6 (XC6SLX150-1FGG676)PIN NO. ON HEADERSpartan 6 (XC6SLX150-1FGG676)PIN NO. ON HEADERSpartan 6 (XC6SLX150-1FGG676)PIN NO. ON HEADERSpartan 6 (XC6SLX150-1FGG676)
A1J25B1J26C1GNDD1G20E1G21F1GND
A2GNDB2L25C2L26D2GNDE2K20F2K21
A3H22B3G22C3GNDD3L20E3L21F3GND
A4GNDB4J23C4J24D4GNDE4H19F4J20
A5K22B5J22C5GNDD5W17E5V16F5GND
A6GNDB6AC20C6AD21D6GNDE6AF21F6AE21
A7Y18B7AA19C7GNDD7AB18E7AA18F7GND
A8GNDB8AC17C8AB17D8GNDE8H20F8H21
A9Y16B9AA17C9GNDD9AC19E9AD19F9GND
A10GNDB10W16C10V15D10GNDE10AE19F10AF19
A11AC14B11AB15C11GNDD11AD18E11AF18F11GND
A12GNDB12AC16C12AD17D12GNDE12AC15F12AD15
A13Y15B13AA15C13GNDD13AE15E13AF15F13GND
A14GNDB14Y14C14AA14D14GNDE14AF14F14AD14
A15U15B15V14C15GNDD15AB13E15AA13F15GND
A16GNDB16V13C16W14D16GNDE16AC13F16AD13
A17U12B17U13C17GNDD17W13E17Y13F17GND
A18GNDB18AB11C18AA11D18GNDE18AD12F18AF12
A19AA12B19AC12C19GNDD19AE11E19AF11F19GND
A20GNDB20AC11C20AD11D20GNDE20AD10F20AF10
A21Y10B21AB10C21GNDD21AE9E21AF9F21GND
A22GNDB22AC9C22AD9D22GNDE22AD8F22AF8
A23AA9B23AB9C23GNDD23AE7E23AF7F23GND
A24GNDB24V12C24W12D24GNDE24AD6F24AF6
A25V11B25W11C25GNDD25AE5E25AF5F25GND
A26GNDB26Y8C26Y9D26GNDE26V8F26W9
A27W7B27W8C27GNDD27AA8E27AB8F27GND
A28GNDB28Y6C28AA7D28GNDE28AB6F28AB7
A29AB5B29AA5C29GNDD29AC4E29AD4F29GND
A30GNDB30AC5C30AD5D30GNDE30AC3F30AB4
A31AA3B31AA4C31GNDD31W5E31Y5F31GND
A32GNDB32V10C32W10D32GNDE32U7F32U8
A33T10B33U9C33GNDD33U5E33V5F33GND
A34GNDB34R5C34T4D34GNDE34U3F34U4
A35T8B35T6C35GNDD35R10E35T9F35GND
A36AF22B36AF23C36AF20D36AF17E36AF4F36AE4
A37AE17B37AD22C37AD20D37AD16E37GNDF37AF3
A38VCC3V3B38E21C38C23D38A24E38F20F38GND
A39GNDB39GNDC39GNDD39GNDE39GNDF39GND
A40VCC3V3B40VCC3V3C40VCC3V3D40VCC3V3E40VCC3V3F40VCC3V3

FT601 - Spartan 6 (FGG676) FPGA Connection Details

FTDI Pin No. Pin Function (245 FIFO)Spartan 6 (FGG676) Pin No.
40FT_D0N22
41FT_D1L23
42FT_D2M23
43FT_D3N23
44FT_D4Y24
45FT_D5AA24
46FT_D6AA25
47FT_D7AB24
50FT_D8AC25
51FT_D9AC24
52FT_D10AE26
53FT_D11AE25
54FT_D12AF25
55FT_D13AD24
56FT_D14AE24
57FT_D15AC23
60FT_D16L17
61FT_D17K18
62FT_D18L18
63FT_D19K19
64FT_D20L19
65FT_D21M21
66FT_D22M19
67FT_D23N24
69FT_D24P24
70FT_D25N21
71FT_D26N20
72FT_D27N19
73FT_D28P18
74FT_D29P17
75FT_D30R18
76FT_D31R17
4FT_BE0P26
5FT_BE1R26
6FT_BE2T26
7FT_BE3U26
8FT_TXEV26
9FT_RXEW26
11FT_WRY26
12FT_RDAA26
13FT_OEAB26
15FT_RSTAC26
16FT_WKAD26
58FT_CLKU25

Driver Installation

This product requires a driver to be installed for proper functioning when used with Windows. The D3XX driver can be downloaded from http://www.ftdichip.com/Drivers/D3XX.htm. Windows Users should download and run the latest WHQL Certified executable file that will prompt to install the FTDI CDM drivers. When driver installation is complete, the module should appear in Callisto S6 Flash Config Tool as Callisto Spartan 6 USB 3.1 Development Board.

Generating Bit Stream for Callisto S6

HDL design needs to be converted to bitstream before it can be programmed to FPGA. Callisto S6 configuration tool at this time accepts only binary (.bin) bit stream created by XILINX ISE (http://www.xilinx.com/tools/webpack.htm). Once the HDL is synthesized, it is easy to create a binary bit stream out of it. Please follow the steps below to generate binary bit stream from your design using ISE Web Pack.

Step 1: Right click on the “Generate Programming File” option in “Processes” window.

Step 2: Select “Process Properties” from the pop-up menu. In the dialog box, check “Create Binary Configuration File” Check box and click “Apply”.

Step 3: Click “OK” to close the dialog box. Right click on “Generate Programming File” option again and select “Run”. Now you will be able to find a “.bin” file in the project directory and that file can be used for Callisto S6 configuration.

Powering Up Callisto S6

Callisto S6 is factory configured to be powered directly from USB port so make sure that you are using a USB port that can power the board properly. It is recommended to connect the board directly to the PC instead of using a hub. It is practically very difficult to estimate the power consumption of the board, as it depends heavily on your design and the clock used. XILINX provides tools to estimate the power consumption. In any case, if power from USB is not enough for your application, external supply can be applied to the board. Callisto S6 requires three different voltages, a 3.3V, a 1.8V supplies and a 1.2V supply. Onboard regulators derive these voltages from the USB/Ext power supply.

Programming Callisto S6 using JTAG

Callisto Spartan6 module features onboard JTAG connector which facilitates easy reprogramming of SRAM and on-board SPI flash through JTAG programmer like “XILINX Platform-cable usb”. Programming Callisto S6 using JTAG requires “XILINX ISE iMPACT” software which is bundled with XILINX ISE Design Suite. To program the SPI flash we need a “.mcs” file needs to be generated from the “.bit” file. Steps for generating “.mcs” file are as below. Programming FPGA SRAM does not require a “.mcs” file to be generated.

Generating “.mcs” file for Callisto S6

Step 1: Open ISE iMPACT. Click on “Create PROM file(PROM file formatter)”. In the dialog box, select “Configure Single FPGA” in storage device type. Then click on the green arrow on the right side.

Step 2: Select 128M in Storage Device (bits).Now click on “Add Storage Device”, then the green arrow on the right side.

Step 3: Set an output file name and the output file location (the “.mcs” file will be generated at this location which will be required later for programming the FPGA), then click OK twice, then select the “.bit” file we already generated then click Open and click NO when it prompts to add another device file.

Step 4: Double-click on “Generate File”. “Generate Succeeded” will be displayed as shown in fig below if the “.mcs” the file is generated successfully.

Programming Onboard SPI flash Using ISE iMPACT

Step 1: Open ISE iMPACT. Click on “Boundary Scan” in the iMPACT flows window on the left top corner. Then right-click on the window panel on the right. Select “Initialize Chain”.

Step 2: If the device is detected properly you will get a pop-up window as shown below, Click OK. Then right-click on the SPI/BPI (next to the black arrow in the below fig.), select Add SPI/BPI Flash.

Step 3: Select the “.mcs” file we already created and click OK. Now choose “N25Q128” in the dialogue box appeared, then click OK.

 

Step 4: Click on “Flash”, Double Click on Program, select OK. If the programming is successful, a confirmation message will be displayed.

 

Technical Specifications

Parameter *ValueUnit
Basic Specifications
Number of GPIOs284
On-board oscillator frequency (ASEM1-100.000MHZ-LC-T)100 (x2)MHz
DDR3 SDRAM (MT41J128M16HA - 125 or Equivalent)2Gb
Quad SPI Flash Memory (N25Q128A13ESE40E)128 Mb
Power supply voltage (USB or External)5 - 12V
FPGA Specifications
Internal supply voltage relative to GND –0.5 to 1.32V
Auxiliary supply voltage relative to GND –0.5 to 3.75V
Output drivers supply voltage relative to GND –0.5 to 3.75V

* All parameters considered nominal. Numato Systems Pvt Ltd reserves the right to modify products without notice.

Physical Dimensions

Callisto S6 GPIO Easy Reference

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