Some readers may remember, we attempted to design a Spartan 6 based FPGA development board with DDR SDRAM almost a year ago. The board worked to the most part except that some obvious mistakes made it impossible to get the DDR up running. We did another attempt this year to design a new board with similar Spartan 6 FPGA and LPDDR. Of course adhering to the same primary principles, 100% open source and 100% KiCad design. I can tell you with great happiness that we have succeeded to make the design working and make it available for sale at our online store. This design is completely open source and designed using KiCad and other open source tools. We have used the following open source tools for designing this board. Use the links at the end of this post to download all source files.
This board features the following major components.
- Xilinx Spartan 6 LX series FPGA, CSG324 package
- 512Mbit 166MHz LPDDR attached to Bank 3 of FPGA
- FTDI FT2232H USB two channel USB device. One channel is dedicated for flash programming and the other
- channel is connected to FPGA IOs to facilitate data transfer to/from FPGA.
- 16Mbit SPI flash memory for non-volatile configuration storage
- 100 MHz stable CMOS oscillator
- Necessary voltage regulators for single rail operation
- Up to 158 IOs available for user defined purpose and are accessible through easy to use expansion connectors
Schematics and layout are designed completely using KiCad. This is a six layer board with no blind or buried vias. The stack up goes as below
The Data, Address and Control signal groups for DDR are length matched. 26 FPGA differential IO pairs are length matched as well. Length matching is done using freerouting tool.
The flash configuration GUI is developed using wxDevC++. Communication with flash is achieved through on board FTDI FT2232H. One of the channels is configured to use MPSSE mode and communicate with the flash over SPI bus. Complete source code of the configuration tool is available for download from our GitHub repository.