TityraCore SODIMM

TityraCore Z7 SoC SODIMM

0 views September 24, 2024 milna-ms 0

Introduction

TityraCore Z7 SoC SODIMM incorporates the AMD Zynq XC7Z020 chip, seamlessly integrating programmable logic with a dual-core ARM Cortex-A9 processor. This integration provides a potent blend of hardware and software processing capabilities, all within a single chip. Zynq series features a hard System on Chip (SoC) with an ARM core. The range of peripherals offered includes an extensive array of functionalities, such as UARTs, Ethernet controllers, USB ports, timers, interrupt controllers, and various other features. It has a seamless integration of the Processing System(PS) with the Programmable Logic (PL) in which the interaction between them is enabled by a high-bandwidth interface, ensuring communication and efficient data transfer between them. TityraCore Z7 SoC SODIMM is specifically designed for the development and integration of FPGA-based accelerated features into other larger designs. It opens up a vast realm of possibilities for implementing innovative solutions across various applications.

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Board features

  • Device: XC7Z020 in CLG484 package, Speed Grade: -1
  • SDRAM: 1 GB DDR3L.
  • Flash memory: 128 Mb Quad bit SPI flash memory.
  • 33 MHz CMOS oscillator
  • 50 MHz CMOS oscillator
  • Gigabit Ethernet.
  • Real Time Clock.
  • CAN BUS.
  • MIPI interfacing.
  • High-Speed USB 2.0 OTG interface.
  • JTAG and USB programming.
  • Micro SD card for memory expansion
  • 8 GB eMMC
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Application

  • Product Prototype Development
  • Accelerated computing integration
  • Custom Embedded platform
  • Signal Processing
  • Communication devices development
  • Educational tool for Schools and Universities
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Components/Tools required

Along with the module, you may need the items in the list below for easy and fast installation.

  1. TityraCore SoC Carrier.
  2. Micro-B cable.
  3. USB-C cable
  4. AMD Platform Cable USB or compatible JTAG programmer. (optional)
  5. DC Power supply (12V).
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Wiring Diagram

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Reference clock

BankPin No.Signal NameFunction
500F7PS_CLK_50033.33 MHz CLK
34W17
IO_L13P_T2_MRCC_33
50 MHz CLK
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Reset

BankPin No.Signal nameFunction
501C9PS_SRST_B_501n RST IN
500B5PS_POR_B_500Program B
34M14IO_L6N_T0_VREF_34IO_RST
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DDR3L SDRAM

TityraCore Z7 SoC SODIMM includes DDR3L memory technology which is the third generation of DDR memory technology designed to operate at lower voltage levels (1.35 V) compared to standard DDR3 modules.

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UART

TityraCore Z7 SoC SODIMM supports UART pins connected to Bank 501 of PS and works at 1.8V voltage.

BankPin No:Signal NameFunction
502D11PS_MIO48_501UART_TX
502C14PS_MIO49_501UART_RX
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QSPI Flash

The TityraCore Z7 SoC SODIMM has 128 Mb of Quad bit SPI flash memory. It is a serial NOR flash which operates at the voltage of 3.3 V. It is connected to QSPI controller of the PS and serves as the default primary boot device. Memory size of QSPI flash memory can be expanded to 8GB using eMMC flash.

BankPin No.Signal NameFunction
500A1
PS_MIO1_500SPI_CS_N
500A2
PS_MIO2_500SPI_DQ[0]
500F6PS_MIO3_500SPI_DQ[1]
500E4PS_MIO4_500SPI_DQ[2]
500A3PS_MIO5_500SPI_DQ[3]
500A4PS_MIO6_500SPI_SCK
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MicroSD Card

The TityrCore Z7 SoC SODIMM have microSD card feature that can be incorporated in the carrier board. SD Card can be used to store non-volatile external memory and also can be used as a mean for secondary booting. It is directly connected to the SD0 controller of the PS MIO bank  and operates at 1.8 V. The SD card can be accessed through the SD card connector in the carrier board.

BankPin No.Signal NameFunction
501E14PS_MIO40_501SD0_CLK
501C8PS_MIO41_501SD0_CMD
501D8PS_MIO42_501SD0_DAT0
501B11PS_MIO43_501SD0_DAT1
501E13PS_MIO44_501SD0_DAT2
501B9PS_MIO45_501SD0_DAT3
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eMMC Flash

TityraCore Z7 SoC SODIMM supports 8 GB of eMMC flash memory for additional storage which is expandable up to 64 GB. It operates at a voltage level of 3.3 V and is connected to SD1 controller of the PS MIO bank . It has four data lines and function as a secondary boot device.

BankPin No.Signal NameFunction
500G7PS_MIO10_500eMMC_DAT0
500B4PS_MIO11_500eMMC_CMD
500C5PS_MIO12_500eMMC_CLK
500A6PS_MIO13_500eMMC_DAT1
500B6PS_MIO14_500eMMC_DAT2
500E6PS_MIO15_500eMMC_DAT3
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Ethernet

TityraCore Z7 SoC SODIMM implements single-Chip 10/100/1000 Mbps Ethernet Transceiver, with 1.8 V IO operating voltage using Gigabit ethernet PHY “KSZ9031RNX”. It provides the Reduced Gigabit Media Independent Interface (RGMII) and is connected to the ENET0 interface of PS MIO bank in Zynq-7000 SOC. It operates in 1.8 V and also supports Link and Activity LED indication in carrier board. Ethernet functionality can be accessed through RJ45 Jack in the carrier board.

BankPin No.Signal NameFunction
501D6PS_MIO16_501ETH_TXCLK
501E9PS_MIO17_501ETH_TXD0
501A7PS_MIO18_501ETH_TXD1
501E10PS_MIO19_501ETH_TXD2
501A8PS_MIO20_501ETH_TXD3
501F11PS_MIO21_501ETH_TXCTL
501A14PS_MIO22_501ETH_RXCLK
501E11PS_MIO23_501ETH_RXD0
501B7PS_MIO24_501ETH_RXD1
501F12PS_MIO25_501ETH_RXD2
501A13PS_MIO26_501ETH_RXD3
501D7PS_MIO27_501ETH_RXCTL
501D10PS_MIO52_501ETH_MDC
501C12PS_MIO53_501ETH_MDIO
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USB 2.0 OTG

TityraCore Z7 SoC SODIMM support high speed USB 2.0 On-The-Go (OTG) transceiver with 24 MHz operating frequency. It uses “USB3340” ULPI transceiver and supports both device and host modes(Default HOST Mode). The ULPI (UTMI+ Low Pin Interface) protocol is utilized to establish a connection between MIO pins and the PHY component. It is connected to the OTG controller of PS MIO bank and works at 1.8V voltage.

The VBUS and USB ID pins play crucial roles in determining whether the OTG operates in Host mode, Device mode, or OTG mode.

BankPin No.Signal NameFunction
501A12PS_MIO28_501USB_D4
501E8PS_MIO29_501USB_DIR
501A11PS_MIO30_501USB_STP
501F9PS_MIO31_501USB_NXT
501C7PS_MIO32_501USB_D0
501G13PS_MIO33_501USB_D1
501B12PS_MIO34_501USB_D2
501F14PS_MIO35_501USB_D3
501A9PS_MIO36_501USB_CLK
501B14PS_MIO37_501USB_D5
501F13PS_MIO38_501USB_D6
501C13PS_MIO39_501USB_D7
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MAC EEPROM

TityraCore Z7 SoC SODIMM features MAC ID EEPROM, which is a memory chip that stores the unique MAC address of a network interface. It is a non-volatile memory that interfaces with PS MIO Bank501 of Zynq-7000 AP SoC. It operates at a voltage of 1.8 V.

BankPin NoSignal nameFunction
501D12PS_MIO46_501MAC_SCL
501B10PS_MIO47_501MAC_SDA
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CAN

The TityraCore Z7 SoC SODIMM facilitates CAN communication via the PS CAN controller and provides a versatile and effective means of establishing connections with diverse peripheral devices utilizing the CAN protocol. It has a operating voltage of 1.8 V.

BankPin No.Signal NameFunction
501D13PS_MIO50_501CAN_RX
501C10PS_MIO51_501CAN_TX
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Real Time Clock

TityraCore Z7 SoC SODIMM includes Real Time Clock (RTC), an integral part of electronic devices that operates independently of the device to accurately track real-world time. It is connected to PL Bank33 and has an operating voltage of 3.3 V. The carrier should include a coin cell battery to provide low power in the absence of an external power supply.

BankPin NoSignal NameFunction
33W18IO_L13N_T2_MRCC_33RTSCL
33W16IO_L14P_T2_MRCC_33RTSDA
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RGB LED

The TityraCore SoC SODIMM includes an RGB LED for user requirements. It is connected to PL Bank33 and has an operating voltage of 3.3 V.

BankPin No.Signal NameFunction
33Y16IO_L14N_T2_SRCC_33LED0
33U15IO_L15P_T2_DQS_33LED1
33U16IO_L15N_T2_DQS_33LED2
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SODIMM Connector Pinout

Signal NameFPGA PinsSODIMM Pin(Top)SODIMM Pin(Bottom)FPGA PinsSignal Name
GND12GPHY_ATXRX_P
n_RST_INC934GPHY_ATXRX_N
GND56GPHY_BTXRX_P
MIPI_LANE0_PM2178GPHY_BTXRX_N
MIPI_LANE0_NM22910GND
MIPI_LANE1_PN221112GPHY_CTXRX_P
MIPI_LANE1_NP221314GPHY_CTXRX_N
MIPI_CLK_PM191516GPHY_DTXRX_P
MIPI_CLK_NM201718GPHY_DTXRX_N
CAM_PWUPN201920GND
CAM_CLKN192122GPHY_ACTIVITY_LED1
CAM_SCLP182324VCC3V3
CAM_SDAP172526GPHY_LINK_LED2
GND2728E4SPI_DQ2
FPGA_TDIH132930A3SPI_DQ3
FPGA_TDOG143132VCC3V3
FPGA_TMSG123334M15FMC_PG_ALL
FPGA_TCKG113536VCC3V3
UART_TXD113738T11PROGRAM_B
UART_RXC143940GND
GND4142C10CAN_TX
SD0_CLKE144344D13CAN_RX
SD0_CMDC84546VCC3V3
GND4748A18PL_IO_L10_T1_AD11_35_P
SD0_DATA0D84950A19PL_IO_L10_T1_AD11_35_N
SD0_DATA1B115152B16PL_IO_L8_T1_AD10_35_P
SD0_DATA2E135354B17PL_IO_L8_T1_AD10_35_N
SD0_DATA3B95556A16PL_IO_L9_T1_DQS_AD3_35_P
PRESENTM165758A17PL_IO_L9_T1_DQS_AD3_35_N
IO_L8_T1_34J225960VCC3V3
PL_IO_L11_T1_SRCC_35_PC176162C15PL_IO_L7_T1_AD2_35_P
PL_IO_L11_T1_SRCC_35_NC186364B15PL_IO_L7_T1_AD2_35_N
GND6566F16PL_IO_L1_T0_AD0_35_P
IO_L6_T0_13_PY46768E16PL_IO_L1_T0_AD0_35_N
IO_L6_T0_13_NAA46970AB5IO_L4_T0_13_P
IO_L1_T0_13_PY67172VCC3V3
IO_L1_T0_13_NY57374AB4IO_L4_T0_13_N
IO_L2_T0_13_PAA77576G17PL_IO_L6_T0_35_P
IO_L2_T0_13_NAA67778F17PL_IO_L6_T0_35_N
GND7980F18PL_IO_L5_T0_AD9_35_P
PL_IO_L17_T2_AD5_35_PE218182E18PL_IO_L5_T0_AD9_35_N
PL_IO_L17_T2_AD5_35_ND218384AA9IO_L11_T1_SRCC_13_P
PL_IO_L24_T3_AD15_35_PH228586AA8IO_L11_T1_SRCC_13_N
PL_IO_L24_T3_AD15_35_NG228788VCC3V3
IO_L12_T1_MRCC_13_PY98990F21PL_IO_L23_T3_35_P
IO_L12_T1_MRCC_13_NY89192F22PL_IO_L23_T3_35_N
IO_L5_T0_13_PAB79394D22PL_IO_L16_T2_35_P
GND9596C22PL_IO_L16_T2_35_N
IO_L5_T0_13_NAB69798AB2IO_L3_T0_DQS_13_P
PL_IO_L14_T2_AD4_SRCC_35_PD2099100AB1IO_L3_T0_DQS_13_N
PL_IO_L14_T2_AD4_SRCC_35_NC20101102B21PL_IO_L18_T2_AD13_35_P
PL_IO_L15_T2_DQS_AD12_35_PA21103104B22PL_IO_L18_T2_AD13_35_N
PL_IO_L15_T2_DQS_AD12_35_NA22105106VCC3V3
IO_L7_T1_13_PR6107108V5IO_L9_T1_DQS_13_P
IO_L7_T1_13_NT6109110V4IO_L9_T1_DQS_13_N
IO_L8_T1_13_PT4111112D16PL_IO_L2_T0_AD8_35_P
GND113114D17PL_IO_L2_T0_AD8_35_N
IO_L8_T1_13_NU4115116B19PL_IO_L13_T2_MRCC_35_P
PL_IO_L12_T1_MRCC_35_PD18117118B20PL_IO_L13_T2_MRCC_35_N
PL_IO_L12_T1_MRCC_35_NC19119120G15PL_IO_L4_T0_35_P
PL_IO_L3_T0_DQS_AD1_35_PE15121122G16PL_IO_L4_T0_35_N
PL_IO_L3_T0_DQS_AD1_35_ND15123124VCC3V3
PL_IO_L22_T3_AD7_35_PG20125126H19PL_IO_L19_T3_35_P
PL_IO_L22_T3_AD7_35_NG21127128H20PL_IO_L19_T3_35_N
PL_IO_L20_T3_AD6_35_PG19129130E19PL_IO_L21_T3_DQS_AD14_35_P
GND131132E20PL_IO_L21_T3_DQS_AD14_35_N
PL_IO_L20_T3_AD6_35_NF19133134AB14IO_L24_T3_33_P
IO_L23_T3_33_PY13135136AB15IO_L24_T3_33_N
IO_L23_T3_33_NAA13137138P16IO_L24_T3_34_P
IO_L22_T3_33_PY14139140R16IO_L24_T3_34_N
IO_L22_T3_33_NAA14141142VCC3V3
IO_L4_T0_33_PW20143144R18IO_L23_T3_34_P
IO_L4_T0_33_NW21145146T18IO_L23_T3_34_N
IO_L3_T0_DQS_33_PV22147148T21IO_L1_T0_33_P
IO_L3_T0_DQS_33_NW22149150U21IO_L1_T0_33_N
GND151152R19IO_L22_T3_34_P
IO_L2_T0_33_PT22153154T19IO_L22_T3_34_N
IO_L2_T0_33_NU22155156J20IO_L9_T1_DQS_34_P
IO_L21_T3_DQS_34_PL18157158K21IO_L9_T1_DQS_34_N
IO_L21_T3_DQS_34_NL19159160VCC3V3
IO_L19_T3_33_PV14161162K19IO_L11_T1_SRCC_34_P
IO_L19_T3_33_NV15163164K20IO_L11_T1_SRCC_34_N
IO_L16_T2_33_PU17165166AA16IO_L18_T2_33_P
IO_L16_T2_33_NV17167168AB16IO_L18_T2_33_N
GND169170V13IO_L20_T3_33_P
IO_L17_T2_33_PAA17171172W13IO_L20_T3_33_N
IO_L17_T2_33_NAB17173174W15IO_L21_T3_DQS_33_P
IO_L12_T1_MRCC_33_PY18175176Y15IO_L21_T3_DQS_33_N
IO_L12_T1_MRCC_33_NAA18177178AB19IO_L10_T1_33_P
IO_L11_T1_SRCC_33_PAA9179180VCC3V3
IO_L11_T1_SRCC_33_NAA8181182AB20IO_L10_T1_33_N
IO_L7_T1_33_PAA22183184AA21IO_L8_T1_33_P
GND185186GND
IO_L7_T1_33_NAB22187188AB21IO_L8_T1_33_N
IO_L9_T1_DQS_33_PY20189190USB_ID
IO_L9_T1_DQS_33_NY21191192USB_5V
IO_L5_T0_33_PU20193194OTG_D_P
IO_L5_T0_33_NV20195196OTG_D_N
IO_L6_T0_33_PV18197198GND
IO_L6_T0_33_NV19199200VCC5V0
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Getting Started With Development on TityraCore

Workflow for the Zynq 7000 series is slightly different than 7-series FPGAs. There is a tutorial on quickly getting up and running with TityraCore to accelerate the pace of development.

Link: https://numato.com/kb/getting-started-with-zynq-on-tityracore-z7-using-vivado-design-suite/

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Powering Up TityraCore

TityraCore is factory configured to be powered only from the carrier so make sure that you have a carrier that can power the board properly.

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Generating Bitstream for TityraCore

The bitstream can be generated for TityraCore in Vivado by following the steps below:

Step 1:  It is recommended to generate .bin file along with .bit file. Right-click on “Generate Bitstream” under the “Program and Debug” section of the Flow Navigator window and click “Bitstream Settings”.

Step 2: Select “-bin_file” option in the dialog window and click “Apply” and then “OK”.

Step 3: Finally click “Generate Bitstream”.

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Programming TityraCore Module Using USB-JTAG

Ensure that the D2XX drivers are installed prior to programming.  The channel A of FTDI FT2232H chip on TityraCore Z7 board is connected to the JTAG interface of the FPGA. Through this connection, USB interface can be used as a JTAG programmer, eliminating the need for a dedicated JTAG cable or connector. Following steps illustrate how to program FPGA on TityraCore Z7 using USB.

1. Ensure that Switch PGM_SEL is set to USB  and Connect the USB Type-C cable to the FPGA board.

2. Click on “Auto connect” under hardware manager and it will automatically establish the connection.

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Programming TityraCore Module Using JTAG

TityraCore Z7 SoC SODIMM facilitates easy reprogramming of SRAM and onboard SPI flash through JTAG programmer like “AMD Platform cable USB”. Following steps illustrate how to program FPGA on TityraCore using JTAG.

Step 1: By using JTAG cable, connect AMD platform cable USB to the carrier of TityraCore and power it up.

Step 2: Open Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.

Step 3: If the device is detected successfully, then select “Program Device” after right clicking on the target device “xc7z020_1 (1)” as shown below.

Step 4: In the dialog window which opens up, Vivado automatically chooses the correct bitstream file if the design was synthesized, implemented and bitstream generated successfully. If needed, browse to the bitstream which needs to be programmed to FPGA. Finally, click “Program”.

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Programming QSPI Flash

Programming the QSPI Flash for the Zynq 7000 series is slightly different than 7-Series FPGAs. There is a tutorial on how to  boot TityraCore from QSPI (as well as SD Card). Follow the same steps for TityraCore Z7 SoC module also.
Link: TityraCore: Boot from SD card and QSPI flash

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Technical Specifications

Parameter *ValueUnit
Basic Specifications
Number of GPIOs126
On-board oscillator frequency33.33MHz
On-board oscillator frequency (ASEM1-50.000MHZ-LC-T)50MHz
DDR3L Capacity2GB
Quad SPI Flash Memory 128Mb
Internal Processor Core Voltage1.0V
Auxiliary supply voltage relative to GND1.8V
Output drivers supply voltage relative to GND-0.5 to 3.6V
PS MIO I/O supply voltage (VCCO_MIO)1.8, 3.3V
PS MIO I/O input voltage1.8, 3.3V
PS DDR I/O input voltage1.35 or 1.5 V
Maximum Processor Frequency667MHz

* All parameters considered nominal. Numato Systems Pvt Ltd reserves the right to modify products without notice.

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Mechanical Dimensions

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IO length details

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