Intel MAX 10 FPGA Boards

Telesto is an easy to use FPGA Module featuring Intel (formerly Altera) MAX 10 FPGA. The MAX 10 FPGAs come with dual embedded NOR Flash, with almost instant-on functionality hence eliminating the need for external configuration memory. The dual configuration flash on MAX 10 allows users to store and dynamically switch between two bitstreams on a single chip. They also feature integrated Analog-to-Digital Converters (ADCs). Telesto is pin compatible with Saturn Spartan 6 FPGA Module, Neso Artix 7 FPGA Module , Skoll Kintex 7 FPGA Module as well as Styx Zynq FPGA Module and offers a seamless upgrade path. The high speed USB 2.0 provides fast and easy configuration download to the built-in flash via JTAG using OpenOCD. No programmer or special downloader cable is needed to download the bitstream to the board. Telesto provides users with flexibility in adding their own peripherals through IOs available on its headers.

• Pin compatible with Saturn Spartan 6 FPGA Module, Neso Artix 7 FPGA Module, Skoll Kintex 7 FPGA Module and Styx Zynq FPGA Module and offers a seamless upgrade path
• Device: MAX 10 FPGA (10M16DA or 10M50DA, F484 package and Speed Grade: -C8)
• DDR3: 2Gb DDR3 (MT41J128M16HA-125:K or equivalant)
• Internal Flash Memory
• 100MHz LVDS oscillator
• High Speed USB 2.0 interface. FT2232H Channel A can be used for custom applications. Channel B is connected to MAX 10 JTAG.
• Onboard voltage regulators for single power rail operation
• FPGA configuration via external JTAG and USB
• Maximum IOs for user-defined purposes
  • FPGA – 150 IOs
  • Analog Inputs – 8 IOs

• Product Prototype Development
• Accelerated computing integration
• Development and testing of custom embedded processors
• Signal Processing
• Communication devices development
• Educational tool for Schools and Universities
• System monitoring

The following sections describe in detail how to use this module.

Along with the module, you may need the items in the list below for easy and fast installation.

1. USB A to Micro B cable.
2. USB-Blaster II (JTAG programmer, Optional)
3. DC Power supply (Optional)

This diagram should be used as a reference only. For detailed information, see Telesto’s schematics and mechanical dimensions at the end of this page. Details of individual connectors are as below.

The on board full speed USB controller helps a PC/Linux/Mac computer to communicate with this module. Use a USB A to Micro B cable to connect to a PC. By default, the module is powered by USB so make sure not to overcrowd unpowered USB hubs (the picture on the right shows USB Micro connector).

By default, the board is configured to use +5V supply from USB. So an external power is not required unless USB port is unable to supply enough current. USB 2.0 ports are only capable of providing enough current for the module for small designs which require less power. The current requirement for this board largely depends on your application. Please consult FPGA data sheet for more details on power requirements. If for any reason, an external power supply needs to be used for the board, the Power select jumper should be configured properly before connecting the power supply. Please refer to the marking on the board for more details. The external power supply should be in the range of +5 to +12V, with sufficient current rating.

The “Power Select” header P2 is used to configure the power source for the board. Connect pins 1 and 2 to use USB power and connect pins 2 and 3 to use the external DC power.

Telesto features a DIP-Switches and Push-Button as shown below

DIP-Switches:

DIP Switches are connected to FPGA pins H9 (nCONFIG) and H10 (CONFIG_SEL). nCONFIG and CONFIG_SEL pins are pulled up with 10K resistor.

nCONFIG is used to control the configuration cycle. ON to OFF transition will reset the FPGA and OFF to ON transition will trigger the FPGA configuration.

CONFIG_SEL pin is used to select the image to load the configuration. The image CFM0 is selected when this pin is OFF state and image CFM1 is selected when this pin is ON state. CFM0 and CFM1 are internal flash configuration images.

Reset Push-Button:

Telesto features a Push-button S1 normally meant to be used as “Reset” signal for designs running on FPGA. Push button S1 is connected to FPGA pin D9. Push-button S1 is active-high, and users need to enable FPGA’s internal Pulldown on the pin D9 to use the pushbutton correctly. This pushbutton can also be used for any other input, and is not just limited to be used as a Reset signal.

JTAG connector provides access to FPGA’s JTAG pins. A USB-Blaster II cable can be used to for JTAG programming.

This device is equipped with a maximum 150 user IO pins that can be used for various custom applications. All user IOs  are length matched and can be used as differential pairs.

Bank wise IO Length Matching Details:

* ADC_CH1 – ADC_CH8 pins are ADC pins.

Windows

This product requires a driver to be installed for proper functioning when used with Windows. The D2XX driver can be downloaded from http://www.ftdichip.com/Drivers/D2XX.htm. Windows Users should download and run the latest WHQL Certified executable file that will prompt to install the FTDI CDM drivers.

Telesto is factory configured to be powered directly from USB port so make sure that you are using a USB port that can power the board properly. It is recommended to connect the board directly to the PC instead using a hub. It is practically very difficult to estimate the power consumption of the board, as it depends heavily on your design and the clock used. ALTERA provides tools to estimate the power consumption. In any case if power from USB is not enough for your application, external supply can be applied to the board. Jumper P2 should be set up properly (short pin 2-3) to use the board on external power. Telesto requires five different voltages, a 3.3V, a 2.5V, a 1.8V, a 1.2V, a 0.75V supplies and a 1.5V supply. On-board regulators derive these voltages from the USB/Ext power supply.

The Telesto MAX10 FPGA Module can be programmed by two methods:

1. Using external USB-Blaster II connected to JTAG header.
2. Using Telesto’s onboard USB with OpenOCD.

Telesto Max 10 FPGA Module features a JTAG connector which facilitates easy reprogramming of SRAM and internal flash through external JTAG programmer like “USB-Blaster II”. Programming Telesto using USB-Blaster requires “Quartus Programmer”. To program the FPGA SRAM, an “.sof” (SRAM object file) file is required and to program internal flash, a “.pof” (Programmer object file) file is required. In Quartus, the .sof and .pof files are generated automatically as part of compilation process. Please follow the steps below to program Telesto using USB-Blaster.

Step 1: Run Quartus Prime Programmer and set up the hardware by clicking “Hardware Setup” as shown below. Select the hardware as “USB-Blaster” or equivalent.

Step 2: Click “Close”. Next, double-click “Auto Detect”, select the device as applicable and click “OK”.

Step 3: Double-click “none” as shown below and select the “.sof/.pof” file to program Telesto with.

Step 4: Select the “Program/Configure” option and click “Start” to program the FPGA on Telesto.

To program Telesto using OpenOCD using the on-board USB interface on Telesto, please refer to the article “Programming Telesto using OpenOCD” in our Knowledge Base: https://numato.com/kb/programming-telesto-using-openocd/

Telesto Schematics

Telesto MAX10 GPIO Easy Reference