Xilinx Kintex 7 FPGA Boards

Proteus Kintex 7 USB 3.1 Development Board

39 views March 7, 2017 rohitsingh 0

Introduction

Proteus is an easy to use FPGA Development board featuring the Xilinx Kintex-7 FPGA with 4GB DDR3L SDRAM. This board contains the Xilinx XC7K160T– FBG676 FPGA. The high-speed USB 3.1 interface (USB-C connector) provides fast and easy configuration download to the onboard SPI flash. There is no need for a programmer or special downloader cable to download bitstream to the board. The board features a High Pin Count (HPC), high-speed FMC connector for addition of extra features to the board by utilizing custom or commercial off-the-shelf daughter boards. Proteus provides user the flexibility of adding their own peripherals through the ANSI/VITA 57.1 standard compliant FMC HPC connector.

Applications:

  • Product Prototype Development
  • Communication Devices Development
  • Accelerated Computing Integration
  • Development and Testing of Custom embedded processors
  • Signal Processing
  • Educational tool for Schools and Universities

Board Features:

  • FPGA Xilinx Kintex-7 XC7K160T– FBG676 package; Speed Grade: 1
  • 4GB DDR3L SODIMM SDRAM M471B5173CB0-YK0 or compatible
  • 128 MB QSPI flash memory (N25Q128A13ESE40E) for Configuration and optional data storage
  • 1 x 100MHz CMOS oscillator, 1x 150MHz LVDS oscillator for users
  • 2 x 150MHz LVDS oscillator for GTP
  • High-speed USB 3.1 interface (USB Type-C connector)
  • Onboard voltage regulators for single power rail operation
  • 12V DC power supply
  • Maximum 130 IOs for user-defined purposes on FMC connector
  • 8x GTX lanes upto 6.6Gbps on ANSI/VITA 57.1 Standard compliant FMC HPC connector
  • Micro SD Card
  • A push button for the reset input
  • JTAG header for programming and debugging.
  • 1 RGB LED for custom use.

 

How to use Proteus Kintex 7 USB 3.1 Development Board

Components/Tools Required

Along with the module, you may need the accessories listed below for easy and fast installation:

  1. 12 V DC Power Supply.
  2. USB A to USB-C cable (Optional).
  3. A Xilinx Platform Cable USB II compatible JTAG programmer

Connection Diagram

This diagram should be used as a reference only. For detailed information, see Proteus’s schematics and mechanical dimensions at the end of this page. Details of individual connectors are as shown below.

USB Interface (USB-C Connector)

This super speed USB 3.1 interface (USB-C connector) is used to help the host PC to communicate with the module at a very high speed (5Gbps). A USB-A to USB-C cable is used to connect the module to the host PC. It is primarily used to output debug information or as a console for the design running on the board. (the picture on the right shows USB-C connector).

Power

Proteus requires +12V power supply to function properly which can be supplied via DC Connector.

The current requirement for this board largely depends upon your application. The Proteus module works on the power supplying 0.6 A and 1 A of current for simple applications. However, a power supplying 2 A of current is recommended for a smooth running of bigger applications. Kindly consult the FPGA data sheet for more details on power requirements.

Power Switch

The Power Switch S3 is used to configure the power source to the board. Slide it to ON to supply power to the board from USB or External DC Jack. Slide it to OFF to power off the board.

Heat Sink

A Heat Sink comes factory-installed with Proteus to provide for heat dissipation for the Kintex-7 FPGA on board. A header is provided to optionally connect a fan (not factory installed) for forced-cooling. The fan’s speed is controlled by the FAN_PWM signal connected to FPGA IO location J25, and the signal is pulled up by default, which means unless actively driven to 0 or controlled via PWM, the fan will run at maximum speed.

SODIMM Memory Slot

Proteus features a SODIMM Memory Slot, factory-populated with 4GB DDR3L SDRAM. Only compatible modules should be inserted into this slot.

Configuration Mode Switch

FPGA startup configuration mode can be selected using switch S1. Sliding it to ON puts FPGA in “JTAG” configuration mode. Sliding it to OFF puts the FPGA to “Master SPI” configuration mode.

Reset Button

Proteus features a Push-button S2 normally meant to be used as “Reset” signal for designs running on FPGA. Push-button S2 is connected to FPGA pin C26. Push-button S2 is active-high. This pushbutton can also be used for any other input and is not just limited to be used as a Reset signal.

RGB LED

Proteus features an RGB LED which can be used for customizing or debugging purposes. The LED is wired in active-low configuration.

Micro SD

The Proteus board features an onboard Micro SD adapter. You can add the data logging, media storage, and other file storage by installing Micro SD Card and appropriate IP. The connection between FPGA and Micro SD Card is shown below

 

JTAG Chain Configuration

The Proteus FPGA JTAG chain configuration can be altered according to requirement by using the DIP switch P2 located near the JTAG Header.

Following diagram shows JTAG chain configuration:

Proteus has automatic FMC detection using PRSNT_M2C_L signal from FMC. Normally, when an FMC board is not connected, the Proteus’s onboard circuitry will automatically close the JTAG chain keeping FMC out from the chain, so no user intervention is required. But, still jumper P2 has been provided as a redundant backup to close the JTAG chain in case the automatic circuitry doesn’t work due to non-compliant FMC modules connected to Proteus, or any or unforeseen reasons.

JTAG

JTAG connector allows the FPGA’s JTAG registers to be accessed using a JTAG cable, compatible with Xilinx Platform Cable USB. Use this header, to attach JTAG cable for programming and debugging.

FMC VADJ Power Supply

VADJ Power Supply for FMC Bank A is configurable via jumpers J3. Following are the jumper configurations for different voltages for VADJ supply.

Jumper on J3 HeaderFMC VADJ Power Supply (Volts)
No jumper anywhere3.3
1 - 22.5
3 - 41.8
5 - 61.5
7 - 81.2

FMC Connector

Proteus features a high speed, high pin-count FMC connector which can be used to provide additional features and capabilities to it using custom or commercial-off-the-shelf daughter boards. Apart from IOs, 8 GTX lanes are available via FMC connector for custom purpose.

FMC BANKS A TO D

AFMC Pin NameKintex-7
FBG676 Pin
BFMC Pin NameKintex-7
FBG676 Pin
CFMC Pin NameKintex-7
FBG676 Pin
DFMC Pin NameKintex-7
FBG676 Pin
A1GNDB1CLK_DIRD23C1GNDD1PG_C2MD26
A2DP1_M2C_PE4B2GNDC2DP0_C2M_PF2D2GND
A3DP1_M2C_NE3B3GNDC3DP0_C2M_NF1D3GND
A4GNDB4DP9_M2C_PNCC4GNDD4GBT_CLK0_M2C_PF6
A5GNDB5DP9_M2C_NNCC5GNDD5GBT_CLK0_M2C_NF5
A6DP2_M2C_PC4B6GNDC6DP0_M2C_PG4D6GND
A7DP2_M2C_NC3B7GNDC7DP0_M2C_NG3D7GND
A8GNDB8DP8_M2C_PNCC8GNDD8LA01_CC_PY23
A9GNDB9DP8_M2C_NNCC9GNDD9LA01_CC_NAA24
A10DP3_M2C_PB6B10GNDC10LA06_PY25D10GND
A11DP3_M2C_NB5B11GNDC11LA06_NY26D11LA05_PW25
A12GNDB12DP7_M2C_PJ4C12GNDD12LA05_NW26
A13GNDB13DP7_M2C_NJ3C13GNDD13GND
A14DP4_M2C_PR4B14GNDC14LA10_PV21D14LA09_PW20
A15DP4_M2C_NR3B15GNDC15LA10_NW21D15LA09_NY21
A16GNDB16DP6_M2C_PL4C16GNDD16GND
A17GNDB17DP6_M2C_NL3C17GNDD17LA13_PK20
A18DP5_M2C_PN4B18GNDC18LA14_PJ18D18LA13_NJ20
A19DP5_M2C_NN3B19GNDC19LA14_NJ19D19GND
A20GNDB20GBTCLK1_M2C_PH6C20GNDD20LA17_CC_PE18
A21GNDB21GBTCLK1_M2C_NH5C21GNDD21LA17_CC_ND18
A22DP1_C2M_PD2B22GNDC22LA18_CC_PF17D22GND
A23DP1_C2M_ND1B23GNDC23LA18_CC_NE17D23LA23_PC17
A24GNDB24DP9_C2M_PNCC24GNDD24LA23_NC18
A25GNDB25DP9_C2M_NNCC25GNDD25GND
A26DP2_C2M_PB2B26GNDC26LA27_PG15D26LA26_PJ15
A27DP2_C2M_NB1B27GNDC27LA27_NF15D27LA26_NJ16
A28GNDB28DP8_C2M_PNCC28GNDD28GND
A29GNDB29DP8_C2M_NNCC29GNDD29FMC_TCKL8
A30DP3_C2M_PA4B30GNDC30FMC_SCLC21D30FPGA_TDO_FMC_TDIR7
A31DP3_C2M_NA3B31GNDC31FMC_SDAB21D31TDOFMC_TDOR6
A32GNDB32DP7_C2M_PH2C32GNDD323V3AUXVCC3V3
A33GNDB33DP7_C2M_NH1C33GNDD33FMC_TMSN8
A34DP4_C2M_PP2B34GNDC34GNDD34TRST_LNC
A35DP4_C2M_NP1B35GNDC3512P0VVCC12V0D35GND
A36GNDB36DP6_C2M_PK2C36GNDD363PV3VCC3V3
A37GNDB37DP6_C2M_NK1C3712P0VVCC12V0D37GND
A38DP5_C2M_PM2B38GNDC38GNDD383PV3VCC3V3
A39DP5_C2M_NM1B39GNDC393PV3VCC3V3D39GND
A40GNDB40NCC40GNDD403PV3VCC3V3

FMC BANKS E TO H

EFMC Pin NameKintex-7 FBG676 PinFFMC Pin NameKintex-7 FBG676 PinGFMC Pin NameKintex-7 FBG676 PinHFMC Pin NameKintex-7 FBG676 Pin
E1GNDF1PG_M2CE26G1GNDH1VREF_A_M2CNC
E2HA01_CC_PN21F2GNDG2CLK1_M2C_PAC23H2PRSNT_M2C_LB26
E3HA01_CC_NN22F3GNDG3CLK1_M2C_NAC24H3GND
E4GNDF4HA00_CC_PP23G4GNDH4CLK0_M2C_PY22
E5GNDF5HA00_CC_NN23G5GNDH5CLK0_M2C_NAA22
E6HA05_PR18F6GNDG6LA00_CC_PAA23H6GND
E7HA05_NP18F7HA04_PN19G7LA00_CC_NAB24H7LA02_PAD26
E8GNDF8HA04_NM20G8GNDH8LA02_NAE26
E9HA09_PN18F9GNDG9LA03_PAA25H9GND
E10HA09_NM19F10HA08_PU19G10LA03_NAB25H10LA04_PAD25
E11GNDF11HA08_NU20G11GNDH11LA04_NAE25
E12HA13_PU24F12GNDG12LA08_PU26H12GND
E13HA13_NU25F13HA12_PT24G13LA08_NV26H13LA07_PV23
E14GNDF14HA12_NT25G14GNDH14LA07_NV24
E15HA16_PR25F15GNDG15LA12_PM17H15GND
E16HA16_NP25F16HA15_PP24G16LA12_NL18H16LA11_PL19
E17GNDF17HA15_NN24G17GNDH17LA11_NL20
E18HA20_PM25F18GNDG18LA16_PT18H18GND
E19HA20_NL25F19HA19_PK25G19LA16_NT19H19LA15_PU17
E20GNDF20HA19_NK26G20GNDH20LA15_NT17
E21HB03_PNCF21GNDG21LA20_PK16H21GND
E22HB03_NNCF22HB02_PNCG22LA20_NK17H22LA19_PH16
E23GNDF23HB02_NNCG23GNDH23LA19_NG16
E24HB05_PNCF24GNDG24LA22_PC19H24GND
E25HB05_NNCF25HB04_PNCG25LA22_NB19H25LA21_PD19
E26GNDF26HB04_NNCG26GNDH26LA21_ND20
E27HB09_PNCF27GNDG27LA25_PF19H27GND
E28HB09_NNCF28HB08_PNCG28LA25_NE20H28LA24_PD15
E29GNDF29HB08_NNCG29GNDH29LA24_ND16
E30HB13_PNCF30GNDG30LA29_PE15H30GND
E31HB13_NNCF31HB12_PNCG31LA29_NE16H31LA28_PG17
E32GNDF32HB12_NNCG32GNDH32LA28_NF18
E33HB19_PNCF33GNDG33LA31_PG19H33GND
E34HB19_NNCF34HB16_PNCG34LA31_NF20H34LA30_PH17
E35GNDF35HB16_NNCG35GNDH35LA30_NH18
E36HB21_PNCF36GNDG36LA33_PL17H36GND
E37HB21_NNCF37HB20_PNCG37LA33_NK18H37LA32_PH19
E38GNDF38HB20_NNCG38GNDH38LA32_NG20
E39VADJVCCVADJF39GNDG39VADJVCCVADJH39GND
E40GNDF40VADJVCCVADJG40GNDH40VADJVCCVADJ

FMC BANKS J – K

JFMC Pin NameKintex-7 FBG676 PinKFMC Pin NameKintex-7 FBG676 Pin
J1GNDGNDK1VREF_B_M2CNC
J2CLK3_BIDIR_PR21K2GNDGND
J3CLK3_BIDIR_NP21K3GNDGND
J4GNDGNDK4CLK2_BIDIR_PR22
J5GNDGNDK5CLK2_BIDIR_NR23
J6HA03_PAD23K6GNDGND
J7HA03_NAD24K7HA02_PAB22
J8GNDGNDK8HA02_NAC22
J9HA07_PR16K9GNDGND
J10HA07_NR17K10HA06_PP16
J11GNDGNDK11HA06_NN17
J12HA11_PP19K12GNDGND
J13HA11_NP20K13HA10_PT20
J14GNDGNDK14HA10_NR20
J15HA14_PR26K15GNDGND
J16HA14_NP26K16HA17_CC_PM21
J17GNDGNDK17HA17_CC_NM22
J18HA18_PN26K18GNDGND
J19HA18_NM26K19HA21_PM24
J20GNDGNDK20HA21_NL24
J21HA22_PT22K21GNDGND
J22HA22_NT23K22HA23_PU22
J23GNDGNDK23HA23_NV22
J24HB01_PNCK24GNDGND
J25HB01_NNCK25HB00_CC_PNC
J26GNDGNDK26HB00_CC_NNC
J27HB07_PNCK27GNDGND
J28HB07_NNCK28HB06_CC_PNC
J29GNDGNDK29HB06_CC_NNC
J30HB11_PNCK30GNDGND
J31HB11_NNCK31HB10_PNC
J32GNDGNDK32HB10_NNC
J33HB15_PNCK33GNDGND
J34HB15_NNCK34HB14_PNC
J35GNDGNDK35HB14_NNC
J36HB18_PNCK36GNDGND
J37HB18_NNCK37HB17_CC_PNC
J38GNDGNDK38HB17_CC_NNC
J39VIO_B_M2CNCK39GNDGND
J40GNDGNDK40VIO_B_M2CNC

FT601 - Kintex-7 (FBG676) FPGA Connection Details

FTDI Pin No. Pin Function (245 FIFO)Kintex-7 (FBG676) Pin No.
40FT_D0J8
41FT_D1H8
42FT_D2F8
43FT_D3D8
44FT_D4A8
45FT_D5H9
46FT_D6G9
47FT_D7C9
50FT_D8B9
51FT_D9A9
52FT_D10J10
53FT_D11G10
54FT_D12F10
55FT_D13B10
56FT_D14A10
57FT_D15J11
60FT_D16H11
61FT_D17G11
62FT_D18E11
63FT_D19C11
64FT_D20B11
65FT_D21H12
66FT_D22G12
67FT_D23C12
69FT_D24B12
70FT_D25A12
71FT_D26E12
72FT_D27J13
73FT_D28H13
74FT_D29D13
75FT_D30C13
76FT_D31A13
4FT_BE0J14
5FT_BE1H14
6FT_BE2G14
7FT_BE3F14
8FT_TXED14
9FT_RXEA14
11FT_WRB14
12FT_RDC14
13FT_OEA15
15FT_RSTD10
16FT_WKB15
58FT_CLKE10

Driver Installation

This product requires a driver to be installed for proper functioning when used with Windows. The D3XX driver can be downloaded from http://www.ftdichip.com/Drivers/D3XX.htm. Proteus also has one FT232h which requires D2XX driver (It can be downloaded from http://www.ftdichip.com/Drivers/D2XX.htm). Windows Users should download and run the latest WHQL Certified executable file that will prompt to install the FTDI CDM drivers. When driver installation is complete, the module should appear in Proteus Flash Config Tool as Proteus Kintex 7 USB 3.1 Development Board.

Generating Bitstream Using Vivado

The bitstream can be generated for Proteus in Vivado by following the steps below:

Step 1: It is recommended to generate .bin bitstream file along with .bit bitstream file. Click “Bitstream Settings”.

Step 2: In the window that pops up, select “-bin_file*” option and Click OK.

Step 3: Finally click “Generate Bitstream”.

Programming Proteus Using JTAG

Proteus Kintex-7 USB 3.1 Development Board features an onboard JTAG connector which facilitates easy reprogramming of SRAM and onboard SPI flash through JTAG programmer like “Xilinx Platform cable USB”. Following steps illustrate how to program FPGA on Proteus using JTAG.

Step 1: Connect Xilinx Platform cable USB to Proteus using JTAG cable. Power up Proteus.

Step 2:  Open Vivado Project. Click on “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.

Step 3: If the device is successfully detected, then right click on the “xc7k160t_0(1)”. Select “Program Device” as shown below.

Step 4: In the dialog window which opens up, Vivado automatically chooses the correct bitstream file if the design was synthesized and implemented, and its bitstream was generated successfully. If needed, you can browse to the bitstream which needs to be programmed to the FPGA.

Click on the “Program” button and let the FPGA be programmed. There is a green colored LED (D1) on Proteus which was lights up as an indicator that the FPGA is not programmed. Hence, once the programming process of FPGA is completed, the LED stops glowing.

Programming QSPI Flash using Vivado

A .bin or .mcs file is required for programming Proteus’s on-board QSPI flash.

Step 1: Open Vivado Project. Click on “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window.

Step 2: If the device is successfully detected, then right click on the “xc7k160t_0”. Select “Add Configuration Memory Device” as shown below.

Step 3: Select the memory device “mt25ql128-spi-x1_x2_x4 (which is equivalent to n25q128-3.3v-spi-x1_x2_x4)”, then click OK.

 

Step 4: After completion of Step 3 the following dialog box will open. Click OK.

Step 5: Browse to the working .bin file or the .mcs file (whichever applicable) and click OK to program as shown below. If programming is successful, a confirmation message will be displayed.

 

Technical Specifications

Parameter*Value Unit
Basic Specifications
Number of GPIO(max)130
On-board Oscillator Frequency (ASEM1-100.000MHZ-LC-T)100MHz
On-board Oscillator Frequency (ASVMPLV-150.000MHZ-L-T)150 (x3)MHz
DDR3 (M471B5173CB0-YK0)4 (x1)Gb
Quad SPI Flash Memory (N25Q128A13EF840E)128Mb
Power Supply voltage (External)5 - 12V
FPGA Specifications
Internal supply voltage relative to GND-0.5 to 1.1V
Auxillary supply voltage relative to GND-0.5 to 2.0V
Output driver supply voltage relative to GND-0.5 to 3.6
Connector Header Specifications (0459714515)
Number of Positions400
Number of Rows 10
Height above Board8.05mm
Pitch1.27mm
Mated Stacking Height10, 10.5, 11, 11.5, 12.5, 13, 15mm
Mated Receptacle on Proteus module0459714515

Mechanical Dimensions

Vivado XDC Constraints

Schematics

Proteus FMC Easy Reference

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