Introduction
Introducing the Mimas S7 Lite FPGA Development Board: Unleash Your Creativity with Compact Power.
Mimas S7 Lite is an easy to use FPGA Development board featuring Spartan 7 FPGA (XC7S50 – 1CSG324C package). Discover the Mimas S7 Lite, a versatile FPGA board featuring the robust FT2232H core. Ideal for diverse applications, this compact board includes QSPI flash for efficient data storage, 8 LEDs, 2 buttons for user interaction, and nine 6×2 headers for extensive connectivity. Whether you’re into digital signal processing, prototyping, or educational projects, the Mimas S7 Lite offers a powerful and user-friendly platform to bring your ideas to life.
Board Features
- FPGA: XC7S50 in CSGA324 package, Speed Grade: -1.
- Flash memory: 128 Mb Quadbit SPI flash memory (MT25QL128ABA1ESE-0SIT).
- 100MHz CMOS Oscillator.
- FTDI FT2232H based host interface.
- FPGA configuration via JTAG and USB.
- 2 push buttons and 8 LEDs for User defined purposes.
- Nine PMODs for User defined purposes.
Connection Diagram
The following connection diagram should be used for reference only.
USB Interface
The onboard high speed USB controller helps a PC/Linux/Mac computer to communicate with this module. Use a USB A to C cable to connect with a PC. By default, the module is powered by USB so make sure not to overcrowd unpowered USB hubs (the picture on the right shows C connector).
JTAG Connector
JTAG pins FPGA pins
TCK D9
TDO T8
TDI R9
TMS T9
PROG_B and Reset Buttons
Mimas S7 lite features a Push-button S1 normally meant to be used as a “PROG_B” signal for configuration reset. Push-button S1 is connected to FPGA pin R8. For enabling manual configuration reset, push-button S1 is connected to GND. The user can reconfigure the FPGA manually, by pressing this push-button S1.
“PROG_B” is an active-low input pin (pulled up with 4.7K external resistor) to the FPGA and it controls the configuration logic. When the PROG_B pin is de-asserted, resets the FPGA and initializes the new configuration.
Mimas S7 features a Push-button S2 normally meant to be used as “Reset” signal for designs running on FPGA. Push-button S2 is connected to FPGA pin T14. Push-button S2 is active-high. This push button can also be used for any other input and is not just limited to be used as a Reset signal.
8 LED'S and 2 BTN's Connection
LED Connection
LED pins FPGA pins
LED0 A10
LED1 C9
LED2 A9
LED3 B11
LED4 D11
LED5 C10
LED6 C11
LED7 C12
BTN Connection
BTN pins FPGA pins
SW1 A11
SW2 D10
clock and Reset
Functions FPGA pins
RSTPIN T14
CLK1 D14
PROGRAM_B R8
QSPI Connection
QSPI pins FPGA pins
SPI_DQ0 K17
SPI_DQ1 K18
SPI_DQ2 L14
SPI_DQ3 M15
SPI_CS_N M13
SPI_SCK C8
FT2232H - Spartan-7 (CSGA324) FPGA Connection Details
FTDI Pin No. Pin Function (245 FIFO) Spartan 7 (CSGA324) Pin No.
38 FTDI-D0/TXD L13
39 FTDI-D1/RXD N13
40 FTDI-D2 L17
41 FTDI-D3 L18
43 FTDI-D4 M17
44 FTDI-D5 M18
45 FTDI-D6 M16
46 FTDI-D7 N18
48 FTDI-RXF# P18
52 FTDI-TXE# P17
53 FTDI-RD# R18
54 FTDI-WR# T18
55 FTDI-SIWUA L16
PMOD HEADERS
P1
Pin No. On The Header PMOD Pin Name FPGA PIN Pin No. On The Header PMOD Pin Name FPGA PIN
6 VCC 12 VCC
5 GND 11 GND
4 P1_2_N G18 10 P1_4_N H17
3 P1_2_P H18 9 P1_4_P H16
2 P1_1_N G17 8 P1_3_N H14
1 P1_1_P G16 7 P1_3_P H13
P2
Pin No. On The Header PMOD Pin Name FPGA PIN Pin No. On The Header PMOD Pin Name FPGA PIN
6 VCC 12 VCC
5 GND 11 GND
4 P2_2_N T11 10 P2_4_N V12
3 P2_2_P R11 9 P2_4_P U11
2 P2_1_N T13 8 P2_3_N P16
1 P2_1_P T12 7 P2_3_P N15
P3
Pin No. On The Header PMOD Pin Name FPGA PIN Pin No. On The Header PMOD Pin Name FPGA PIN
6 VCC 12 VCC
5 GND 11 GND
4 P3_2_N V4 10 P3_4_N U6
3 P3_2_P V5 9 P3_4_P U7
2 P3_1_N V6 8 P3_3_N R6
1 P3_1_P V7 7 P3_3_P R7
P4
Pin No. On The Header PMOD Pin Name FPGA PIN Pin No. On The Header PMOD Pin Name FPGA PIN
6 VCC 12 VCC
5 GND 11 GND
4 P4_2_N P1 10 P4_4_N R1
3 P4_2_P P2 9 P4_4_P R2
2 P4_1_N U1 8 P4_3_N T2
1 P4_1_P T1 7 P4_3_P R3
P5
Pin No. On The Header PMOD Pin Name FPGA PIN Pin No. On The Header PMOD Pin Name FPGA PIN
6 VCC 12 VCC
5 GND 11 GND
4 P5_2_N L1 10 P5_4_N N2
3 P5_2_P K1 9 P5_4_P N3
2 P5_1_N N1 8 P5_3_N K2
1 P5_1_P M1 7 P5_3_P K3
P6
Pin No. On The Header PMOD Pin Name FPGA PIN Pin No. On The Header PMOD Pin Name FPGA PIN
6 VCC 12 VCC
5 GND 11 GND
4 P6_2_N D1 10 P6_4_N D2
3 P6_2_P E1 9 P6_4_P E2
2 P6_1_N G1 8 P6_3_N F1
1 P6_1_P G2 7 P6_3_P F2
P7
Pin No. On The Header PMOD Pin Name FPGA PIN Pin No. On The Header PMOD Pin Name FPGA PIN
6 VCC 12 VCC
5 GND 11 GND
4 P7_2_N A2 10 P7_4_N A4
3 P7_2_P A3 9 P7_4_P A5
2 P7_1_N A7 8 P7_3_N A6
1 P7_1_P A8 7 P7_3_P B7
P8
Pin No. On The Header PMOD Pin Name FPGA PIN Pin No. On The Header PMOD Pin Name FPGA PIN
6 VCC 12 VCC
5 GND 11 GND
4 P8_2_N A15 10 P8_4_N A16
3 P8_2_P B15 9 P8_4_P B16
2 P8_1_N A13 8 P8_3_N A14
1 P8_1_P B13 7 P8_3_P B14
P9
Pin No. On The Header PMOD Pin Name FPGA PIN Pin No. On The Header PMOD Pin Name FPGA PIN
6 VCC 12 VCC
5 GND 11 GND
4 P9_2_N C18 10 P9_4_N A17
3 P9_2_P D18 9 P9_4_P B17
2 P9_1_N D17 8 P9_3_N B18
1 P9_1_P D16 7 P9_3_P C17
Generating Bitstream Using Vivado
The bitstream can be generated for Mimas S7 lite in Vivado by following the steps below:
Step 1: It is recommended to generate .bin bitstream file along with .bit bitstream file. Click “Bitstream Settings”.
Step 2: Select “-bin_file*” option in the dialog window and Click OK.
Step 3: Finally click “Generate Bitstream”.
Programming Mimas S7 lite Using JTAG
Mimas Spartan7 Lite FPGA features an onboard JTAG connector which facilitates easy reprogramming of SRAM and onboard SPI flash through JTAG programmer like “Xilinx Platform cable USB”. Following steps illustrate how to program FPGA on Mimas S7 using JTAG.
Step 1: By using JTAG cable, connect Xilinx platform cable USB to Mimas S7 and power it up.
Step 2: Open Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.
Step 3: If the device is detected successfully, then select “Program Device” after right clicking on the target device “XC7S50_0” as shown below.
Step 4: In the dialog window which opens up, Vivado automatically chooses correct bitstream file if the design was synthesized, implemented and bitstream generated successfully. If needed, browse to the bitstream which needs to be programmed to FPGA. Finally, click “Program”.
As soon as “Program” is clicked, a green colored DONE LED (D1) on Mimas S7 should light up, indicating that programming process is going on. This LED will turn off when the configuration is complete.
Programming Mimas S7 lite Using USB-JTAG
The channel A of FTDI FT2232H chip on Mimas S7 Lite board is connected to the JTAG interface of the FPGA. Through this connection, USB interface can be used as a JTAG programmer, eliminating the need for a dedicated JTAG cable or connector. Following steps illustrate how to program FPGA on Mimas S7 Lite using USB.
1. Connect the USB Type-C cable to the FPGA board.
2. Execute the following command in Vivado:
exec program_ftdi -write -ftdi FT2232H -serial <serial number> -vendor "ftdi" -desc "Mimas S7 Lite FPGA Module"
3. Once the command is executed, you can connect your board by clicking on “Auto connect” under hardware manager and it will automatically establish the connection.
Programming QSPI Flash using Vivado
A .bin or .mcs file is required for programming Mimas S7 lite’s onboard QSPI flash.
Step 1: Open Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.
Step 2: If the device is detected successfully, then select “Add Configuration Memory Device” after right clicking on the target device “xc7s50_0” as shown below.
Step 3: Select the memory device “mt25ql128-spi-x1_x2_x4”, then click OK.
Step 4: After completion of Step 3 the following dialog box will open. Click OK.
Step 5: Browse to the working .bin file or the .mcs file (whichever applicable) and click OK to program as shown below. If programming is successful, a confirmation message will be displayed.
Technical Specifications
Parameter * Value Unit
Basic Specifications
Number of PMODs 9
On-board oscillator frequency (ASEM1-100.000MHZ-LC-T) 100 MHz
Quad SPI Flash Memory (MT25QL128ABA1ESE-0SIT) 128 Mb
USB Power supply voltage 5 V
FPGA Specifications
Internal supply voltage relative to GND -0.5 to 1.1 V
Auxiliary supply voltage relative to GND -0.5 to 2.0 V
Output drivers supply voltage relative to GND -0.5 to 3.6 V
Mechanical Dimensions
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