Xilinx Spartan 6 FPGA Boards

Galatea is an easy to use FPGA Development board featuring Xilinx Spartan-6 FPGA with x1 PCIe interface and two 1Gb DDR3 SDRAM devices. This board features Xilinx XC6SLX45T – FGG484 FPGA. Other FPGA configurations are available at request. Two high-speed expansion connectors are available onboard for the purpose of adding additional features to the board by using custom or off-the-shelf daughter boards. A rich set of off-the-shelf expansion modules are available at http://numato.com.

Applications

• Product Prototype Development
• Development and testing of custom embedded processors
• Signal Processing
• Communication devices development
• Data Acquisition
• Educational tool for Schools and Universities

Board features

• FPGA: Spartan-6 XC6SLX45T in -3FGG484 package (Other devices available at request)
• 1 lane PCIe Gen1 interface • 2 x DDR3: 1Gb SDRAM MT41J128M16
• 128 Mb QSPI flash memory (N25Q128A13ESE40E) for Configuration and optional data storage
• USB to UART serial converter
• 3 x 100MHz CMOS oscillator
• 2 x 150MHz CMOS oscillator for GTP
• 2 x GTP available on 2x SATA connectors
• MicroSD adapter for bulk data storage
• All differential pairs are length matched on the module
• Maximum 112 IOs for user-defined purposes on FX18 Hirose connectors
• On-board voltage regulators for single power rail operation
• Can be powered from PCIe slot or from an external power supply
• JTAG and SPI headers for programming and debugging
• 44 Length matched LVDS33 differential pairs
• 12 Length matched LVDS1V5 differential pairs
• 2x SMA connectors for Clock or other signal input

Along with the module, you may need the items in the list below for easy and fast installation.

1. 12 V DC Power Supply (not needed if the board is placed on a motherboard)
2. A Xilinx Platform Cable USB II compatible JTAG programmer
3. USB Male A to Micro B cable (optional)

This diagram should be used as a reference only. For detailed information, see Galatea schematics at the end of this document. Details of individual connectors are as below.

This board features a Micro SD adapter on-board. By installing a Micro SD card and appropriate IP, you can add data logging, media storage and other file storage to your design. The FPGA IOs connected to SD card adapter is shown below.

Galatea features two SATA connectors onboard which are connected to two of the four available GTP Transceivers on the FPGA. These GTP lines can be used for high-speed communication protocols with appropriate IP. IO details in the image below.

JTAG connector allows the FPGA’s JTAG registers to be accessed using a JTAG cable compatible with Xilinx Platform Cable USB. Use this header to attach JTAG cable for programming and debugging.

PCIe Connector

QSPI (N25Q128A13ESE40E)

SMA

This device is equipped with a maximum of 112 user GPIO pins that can be used for custom applications. All differential pairs are length matched on the module for better signal integrity.

Header P4

Header P5

Galatea Spartan 6 FPGA Board features an onboard JTAG connector that facilitates easy reprogramming of SRAM and onboard SPI flash through JTAG programmer like “Xilinx Platform cable USB”. Programming Galatea using JTAG requires “Xilinx ISE iMPACT” software which is bundled with Xilinx ISE Design Suite. The FPGA SRAM can be programmed using the .bit file generated from your project. To program the SPI flash we need to generate a “.mcs” file which must be generated from the “.bit” file. Steps for generating the “.mcs” file are as below. Programming FPGA SRAM does not require a “.mcs” file to be generated.

Generating “.mcs” file for Galatea

Step 1: Open ISE iMPACT. Click on “Create PROM file(PROM file formatter)”. In the dialog box, select “Configure Single FPGA” in the storage device type. Then click on the green arrow on the right side.

Step 2: Select 128M in Storage Device (bits). Now click on “Add Storage Device”, then the green arrow on the right side.

Step 3: Set an output file name and the output file location (a “.mcs” extension will be generated at this location and the file will be required later for programming the FPGA), then click OK twice, then select the “.bit” file we already generated then click Open and click NO when it prompts to add another device file.

Step 4: Double click on the “Generate File” option under the iMPACT processes window. “Generate Succeeded” message will be displayed as shown in the image below if the “.mcs” the file is generated successfully.

Step 1: Open ISE iMPACT. Click on “Boundary Scan” in the iMPACT flows window on the left top corner. Then right-click on the window panel on the right. Select “Initialize Chain”.

Step 2: If the device is detected properly you will see a pop-up window as shown below, Click OK. Then right-click on the SPI/BPI (next to the black arrow in the below fig.), select Add SPI/BPI Flash.

Step 3: Select the “.mcs” file we already created and click OK. Now choose “N25Q128” in the dialogue box that appears, then click OK.

Step 4: Click on “Flash” and then double click on Program option in iMPACT processes window. If programming is successful, a confirmation message will be displayed.

Galatea Schematics