EagleCore AU-Plus Development Kit

Introducing the EagleCore AU-Plus Development Kit – NL001 – a groundbreaking System-on-Module designed to deliver unparalleled performance and versatility.

At its heart lies the formidable Artix Ultrascale+ FPGA, providing a robust platform for advanced programmability. This compact module is meticulously crafted, featuring essential components such as DDR, Ethernet, and QSPI Flash. The inclusion of DDR ensures efficient data processing, while Ethernet facilitates high-speed networking, and QSPI Flash ensures reliable and swift storage solutions.

The Artix Ultrascale+ FPGA, renowned for its power and flexibility, positions the EagleCore Development Kit as an ideal solution for a wide array of embedded systems and digital design applications. Elevate your projects with the advanced capabilities of the EagleCore AU-Plus Development Kit.

• Device: Artix Ultrascale+ (XCAU25P-1FFVB676I).
• SDRAM – DDR4.
• Flash Memory: 1 Gb SPI flash memory.
• 1 x Gigabit Ethernet PHY.
• 100MHz CMOS oscillator (Fabric clock).
• 100MHz DDR4 Reference Clock.
• 125MHz MGT Reference Clock.
• Trusted Platform Module.
• OTG PHY.
• EEPROM.
• 4x Razor Beam LSHM Series Samtec Connectors.
• Programming & Debugging: JTAG programming.
• 1 RGB LED for custom use.
• RTC (BQ32000DR).
• 84 differential GPIOs and 18 differential GTH pins for user-defined purposes.

• Artificial Intelligence (AI)
• Industrial Automation
• Embedded Vision
• High-Performance Computing (HPC)
• Aerospace and Defense
• Communication and Networking

1. 5V DC Power Supply.
2. EagleCore Carrier Board.
3. Xilinx Platform Cable USB II JTAG debugger.
4. USB Type C cable.

Please note that the diagram provided is intended solely as a reference.

EagleCore AU-Plus Development Kit features an RGB LED which can be used for customizing or debugging purposes. The LED is wired in the active-low configuration.

The KSZ9031RNX is a completely integrated triple-speed (10BASE-T/100BASE-TX/1000BASE-T) Ethernet physical layer transceiver for transmission and reception of data. It provides the Reduced Gigabit Media Independent Interface (RGMII) for direct connection to RGMII MACs in Gigabit Ethernet processors and switches for data transfer at 10/100/1000 Mbps.

EagleCore AU-Plus Development Kit uses DDR4(MT40A512M16LY-075:E) which is a high-speed dynamic random-access memory internally configured as an eight-bank DRAM. The DDR4 SDRAM uses an 8n-prefetch architecture to achieve high-speed operation. The 8n-prefetch architecture is combined with an interface designed to transfer two data words per clock cycle at the I/O pins. DDR4 is connected to the bank 64 of Artix Ultrascale+ FPGA.

The SOM has 1 Gb of Quad bit SPI flash memory. It is a serial NOR flash which operates at the voltage of 1.8 V. It serves as the default primary boot device.

The Trusted Platform Module(TPM) is an integrated security module for hardware authentication. The security module is used primarily for cryptographic key generation, key storage and key management as well as generation and secure storage for digital certificates.

Header P3

Header P2

Header P1

Header P4

The bitstream can be generated for EagleCore AU-Plus Development Kit in Vivado by following the steps below:

Step 1: It is recommended to generate a .bin bitstream file along with .bit bitstream file. Click “Bitstream Settings”.

Step 2: In the window that pops up, select the “-bin_file*” option and click OK.

Step 3: Finally click “Generate Bitstream”.

EagleCore AU-Plus Development Kit Carrier features an onboard JTAG connector that facilitates easy reprogramming of SRAM and onboard SPI flash through JTAG programmer like “Xilinx Platform cable USB”. The following steps illustrate how to program FPGA on Development Kit using JTAG.

Step1: By using JTAG cable, connect Xilinx platform cable USB to EagleCore AU-Plus Development Kit Carrier and power it up.

Step2: Open the Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.

Step3: If the device is detected successfully, then select “Program Device” by right click on the target device “<add name>” as shown below.

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Step4: In the dialog window which opens up, Vivado automatically chooses the correct bitstream file if the design was synthesized, implemented and bitstream generated successfully. If needed, browse to the bitstream which needs to be programmed to FPGA. Finally, click “Program”.

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A .bin or .mcs file is required for programming EagleCore AU-Plus Development Kit onboard QSPI flash.

Step 1: Open the Vivado project and open the target by clicking on the “Open Target” in “Open Hardware Manager” in the “Program and Debug” section of the Flow Navigator window. Select “Auto Connect”.

Step 2: If the device is detected successfully, then select “Add Configuration Memory Device” by right click on the target device “<name>” as shown below.

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Step 3: Select the memory device “mt25qu01g-spi-x1_x2_x4” then click OK.

Step 4: After completion of Step 3 the following dialog box will open. Click OK.

Step 5: Browse to the working .bin file or the .mcs file (whichever applicable) and click OK to program as shown below. If programming is successful, a confirmation message will be displayed.

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