Neso – A7 FPGA Development Board

SKU: FPGA009

Neso – A7 FPGA Development Board

SKU: FPGA009

    Current configuration - Edit
  • Header Type and IO Headers: Female Header on Top

Original price was: $388.99.Current price is: $319.99.

Features

  • FPGA: XC7A100T in CSG324 package (XC7A100T-2CSG324C)
  • DDR3: 2Gb DDR3(MT41J128M16JT-125:K)
  • Flash memory: 128 Mb SPI flash memory (N25Q128A13ESE40E / IS25LP128F – JBLE)
  • 100MHz CMOS oscillator
  • High-Speed USB 2.0 interface
  • Revision V2: FT2232H Channel B is dedicated to SPI Flash /JTAG Programming. Channel A can be used for custom applications.
  • FPGA configuration via JTAG and USB
  • Maximum IOs for user-defined purposes
    • FPGA – 140 IOs
    • FT2232H – 8 IOs

Applications

  • Product Prototype Development
  • Accelerated computing integration
  • Development and testing of custom embedded processors
  • Signal Processing
  • Communication devices development
  • Educational tool for Schools and Universities

Configure your product

Select a custom configuration for your product. If you need an additional improvement or have any questions, please send us a message on the form below.

Header Type and IO Headers

Neso – A7 FPGA Development Board

SKU: FPGA009

    Current configuration -
  • Header Type and IO Headers: Female Header on Top
Price:

Original price was: $388.99.Current price is: $319.99.

Request For QuoteWanna Customize? Drop Us A Line!

Neso is an easy to use FPGA Development board featuring Artix 7 FPGA. It is specially designed for the development and integration of FPGA based accelerated features to other designs. This development board features Xilinx XC7A100T FPGA with FTDI’s FT2232H Dual-Channel USB device. Xilinx Artix 7 offers the best system performance per watt in class and is a great choice for cost-sensitive applications. The high-speed USB 2.0 interface provides fast and easy configuration download to the onboard SPI flash. No programmer or special downloader cable is needed to download the bitstream to the board.

Neso FPGA Artix 7 Dev Board - Wiring Diagram

Features

  • FPGA: XC7A100T in CSG324 package (XC7A100T-2CSG324C)
  • DDR3: 2Gb DDR3(MT41J128M16JT-125:K)
  • Flash memory: 128 Mb SPI flash memory (N25Q128A13ESE40E / IS25LP128F – JBLE)
  • 100MHz CMOS oscillator
  • High-Speed USB 2.0 interface for Onboard flash programming.
  • Revision V1: FT2232H Channel A is dedicated to SPI Flash /JTAG Programming. Channel B can be used for custom applications.
  • Revision V2: FT2232H Channel B is dedicated to SPI Flash /JTAG Programming. Channel A can be used for custom applications.
  • Onboard voltage regulators for single power rail operation
  • FPGA configuration via JTAG and USB
  • Compact form factor FPGA Module
  • Maximum IOs for user-defined purposes
    • FPGA – 140 IOs
    • FT2232H – 8 IOs

Neso Artix-7 FPGA - Header pinout diagram

General FAQs

Specifications

Attribute Value
Weight 0.12 lbs
Dimensions 5 × 3 × 1 in
Product Dimensions

3.29 x 2.26 x 0.62 in

FPGA

Memory

Primary Clock Frequency

Number Of GPIOs (Max)

Configuration Options

,

Host Interface

Package Contents

HTS

8542.39.0001

ECCN

3A991.d